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PCI/104-Express& PCIe/104SpecificationIncluding OneBank and Adoption on104 , EPIC , and EBX Form FactorsVersion 3.0February 17, 2015Please Note:This specification is subject to change without notice. While every effort has been made to ensure theaccuracy of the material contained within this document, the PC/104 Consortium shall under nocircumstances be liable for incidental or consequential damages or related expenses resulting from the useof this specification. If errors are found, please notify the PC/104 Consortium.The PC/104 logo, PC/104, PC/104-Plus, PCI-104, PCIe/104, PCI/104-Express, 104, OneBank, EPICand EBX are trademarks of the PC/104 Consortium. All other marks are the property of their respectivecompanies.Copyright 2007 - 2015, PC/104 Consortium
IMPORTANT INFORMATION AND DISCLAIMERSThe PC/104 Consortium (“Consortium”) makes no warranties with regard to this PCI/104-Express andPCIe/104 Specifications (“Specifications”) and, in particular, neither warrant nor represent that theseSpecifications or any products made in conformance with them will work in the intended manner. Nor doesthe Consortium assume responsibility for any errors that the Specifications may contain or have anyliabilities or obligations for damages including, but not limited to, special, incidental, indirect, punitive, orconsequential damages whether arising from or in connection with the use of these Specifications in anyway. This specification is subject to change without notice. While every effort has been made to ensurethe accuracy of the material contained within this document, the publishers shall under no circumstances beliable for incidental or consequential damages or related expenses resulting from the use of thisspecification. If errors are found, please notify the publishers.No representations or warranties are made that any product based in whole or part on these Specificationswill be free from defects or safe for use for its intended purposes. Any person making, using, or sellingsuch product does so at his or her own risk. The user of these Specifications hereby expresslyacknowledges that the Specifications are provided as is, and that the Consortium make no representations,or extends any warranties of any kind, either express or implied, oral, or written, including any warranty ofmerchantability or fitness for a particular purpose, or warranty or representation that the Specifications orany product or technology utilizing the Specifications or any subset of the Specifications will be free fromany claims of infringement of any intellectual property, including patents, copyright and trade secrets nordoes the Consortium assume any responsibilities whatsoever with respect to the Specifications or suchproducts.TRADEMARKS AND COPYRIGHTSThe PC/104 logo, PC/104, PC/104-Plus, PCI-104, PCI/104-Express, PCIe/104, 104, EPIC, and EBX aretrademarks of the PC/104 Consortium. PCI, PCI Express, and PCIe are trademarks of PCI-SIG. PS/2,PC/XT, PC/AT and IBM are trademarks of International Business Machines Inc. Information regarding thetraditional stackable PCI bus found on in the PC/104-Plus and PCI-104 specifications is the property of thePC/104 Consortium. All other trademarks are the property of their respective companies.PCIe/104 and PCI/104-Express Specification Revision 3.0February 17, 2015Page 1
REVISION HISTORYMarch 21, 2008 Version 1.0Initial releaseMarch 27, 2009 Version 1.1Add USB and over current signal to pin out, inserted description in 1.4.4, modified shift exampleto include USBSection 2.4 corrected that even numbered pins are located towards the inside of the board and oddnumbered pins are located towards the edge of the boardPEx16 ENA changed to PEG ENA# in section 2.4.1.2 and 2.4.3Figure 2.3 Moved Host to bottom in this figure and added USBFigure 6-14 Top two boards are PCI/104-ExpressFebruary 10, 2011 Version 2.0Added Type 2 connector versionAdded 22mm connector optionRemoved Figure 6 4: Mating of Top Half and Bottom Half of Connector A because this nondimensioned sketch provided no useful informationEditorial changes:o Changed signal names PWRGD to PWRGOOD, CPU DIR to DIR, and 5V Always to 5V SB for consistencyo Corrected USB0 and USB1 in Automatic Link Shifting Examples for Host and VariousDeviceso Corrected text in Appendix B and C related to PCI/104-Express Expansion Zoneo Redrew Example breakout routing of connector bank 1 PCI Express x1 links withshiftingo Changed PCIe to PCI Express when discussing the PCI Express specification.o Cleaned up drawings in Figure 1-1o Swapped order of section 1.3 and 1.4 and edited texto Fixed missing references.o Added signal switches suggestions for SATA and USB 3.0March 21, 2011 Provided SATA definitions that were omitted in previous version.February 18, 2013 Version 2.01Version 2.10Corrected Consortium name in all referencesExpanded introduction to PCI Express to include Gen 1, 2, and 3.Added PCI Express Gen 2 recommendations.o Added devices and updated signal switch table.o Updated layout recommendations section to include PCIe Gen 2 & 3.o Added Gen 2 & 3 to via and trace length table.o Removed microstrip and stripline examples.Added PCI Express x4, x8, and x16 layout examples.Added SATA and USB 3.0 capacitor info and layout examples.Changed SDVO to Alternate FunctionPCIe/104 and PCI/104-Express Specification Revision 3.0February 17, 2015Page 2
December 16, 2014 Version 3.0Added OneBank connector variationUpdated connector mechanical performance specificationsCleaned up Link Shifting wordingAdded stitching capacitors to first bank of PCIe/104 connectorPCIe/104 and PCI/104-Express Specification Revision 3.0February 17, 2015Page 3
TABLE OF CONTENTS1. INTRODUCTION . 11.1. Purpose . 11.2. Standard Identification . 11.3. Description . 11.4. PCIe/104 Type 1 and Type 2 . 21.4.1PCI/104-Express Version 1.0 and 1.1 Host Board Compatibility . 21.4.2PCI/104-Express Version 1.0 and 1.1 Peripheral Board Compatibility . 31.5. PCIe/104 Feature Set . 31.5.1Connector A : PCI Express Bus . 31.6. PCI/104-Express Feature Set . 31.6.1Connector A : Same as 1.5.1 above . 31.6.2Connector B: PCI Bus:. 31.7. General Stacking Rules . 31.8. Stack Up, Stack Down, and Both. 41.9. Bus and Signal Group Descriptions . 41.9.1PCI Express Expansion Bus . 41.9.2SATA Links . 51.9.3LPC Bus . 51.9.4Universal Serial Bus (USB) . 51.9.5System Management Bus . 61.9.6ATX and Power Management. 61.9.7RTC Battery . 71.9.8PCI Expansion Bus . 71.10. References. 72. EXPANSION CONNECTOR A . 82.1. Functions. 82.1.1PCIe/104 Type 1 and Type 2 Common Features . 82.1.2PCIe/104 Type 1 Only Additional Features . 82.1.3PCIe/104 Type 2 Only Additional Features . 82.2. Signal Descriptions . 92.2.1PCIe/104 Type 1 . 92.2.2PCIe/104 Type 2 . 102.3. Signal Naming Convention . 102.4. Pin Assignment . 112.4.1Type 1 x16 PCI Express Link . 14PCIe/104 and PCI/104-Express Specification Revision 3.0February 17, 2015Page 4
2.4.2PEG ENA# Signal. 152.4.3DIR Signal . 152.4.4Stack-UP or Stack-DOWN Link Shifting . 172.4.5Link Shifting PCB Examples . 182.4.6Link Shifting Stack Examples. 192.5. Switching . 212.5.1Signal Switch . 212.6. System Clocking . 212.7. Layout Recommendations . 222.7.1Stitching Capacitors . 222.7.2Number of PCI Express Boards in the Stack . 222.8. Routing Topology . 232.8.1PCI Express and USB 3.0 . 232.8.2SATA . 242.9. Device Connector Break-out Examples . 252.9.1Universal PCI Express x1 Device Layout Example . 252.9.2Universal PCI Express x4 Device Layout Example . 252.9.3Type 1 PCI Express x8 Device Layout Example . 262.9.4Type 1 PCI Express x16 Device Layout Example . 262.9.5Type 2 USB 3.0 Device Layout Example . 272.9.6Type 2 SATA Device Layout Example . 273. EXPANSION CONNECTOR B . 283.1. Description . 283.2. Functions. 283.3. Signal Descriptions . 293.4. Pin Assignment . 303.5. 5V SB, PSON#, and PME# . 303.6. PCI Signaling Voltage (VI/O) Requirements . 313.6.1PCI Host Module . 313.6.2Add-In Modules . 314. PCIe/104 Type 1 and Type 2 Stacking . 324.1. System Stacking Rules. 324.2. Host Configuration Rules . 324.3. Peripheral Configuration Rules. 334.4. Stack Configuration Examples . 34PCIe/104 and PCI/104-Express Specification Revision 3.0February 17, 2015Page 5
5. ELECTRICAL SPECIFICATION. 405.1. Power and Ground . 405.1.1Connector A, PCIe/104, Power Capabilities . 405.1.2Connector B, PCI-104, Power Capabilities. 405.1.3Total PCIe/104 Power Capabilities Connector A Only (OneBank Option) . 415.1.4Total PCI/104-Express Power Capabilities Connector A and B (OneBank Option) . 415.2. AC/DC Signal Specifications . 415.2.2Stackable PCI Expansion Bus . 416. MECHANICAL SPECIFICATIONS . 426.1. Connector A . 426.1.1Part Number . 426.1.2Connector A Specifications . 446.1.3Standard 0.600” (15.24mm) Top Connector A Mechanical Drawings . 456.1.4Optional 0.866” (22.00mm) Top Connector A Mechanical Drawings . 466.1.5Optional OneBank Top Connector A Mechanical Drawings . 476.1.6Standard ASP-129646-03 or equivalent (Bottom Connector) Mechanical Drawings. 496.1.7Optional ASP-129646-22 (OneBank Bottom Connector) Mechanical Drawings . 506.2. Connector B . 506.3. Board Layout & Dimensions . 516.3.1PCIe/104 Layout & Dimensions . 516.3.2PCI/104-Express Layout & Dimensions . 536.3.3Connector A Placement Details . 556.4. Standoff . 56APPENDIX A:PC/104 BRIDGE CARD . 57A.1 Bridge Module Configurations . 58A.2 Stack Configuration Examples . 58APPENDIX B:EPIC FORM FACTOR – PCI/104-Express Placement . 61APPENDIX C:EBX FORM FACTOR – PCI/104-Express Placement . 62PCIe/104 and PCI/104-Express Specification Revision 3.0February 17, 2015Page 6
TABLE OF FIGURESFigure 1-1: PCI/104-Express and PCIe/104 Board Layouts on 104 Form Factor . 1Figure 1-2: OneBank Connector PCI/104-Express and PCIe/104 Board Layouts on 104 Form Factor. 2Figure 1-3 RTC Battery Example .
PCIe/104 and PCI/104-Express Specification Revision 3.0 February 17, 2015 Page 1 IMPORTANT INFORMATION AND DISCLAIMERS The PC/104 Consortium (“Consortium”) makes no wa rranties with regard to this PCI/104-Express and PCIe/104 Specifications (“Specifications”) and
