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ఢॾ३DataSheetCUSTOMER :Company Name̳ΦЩჍModel NO :FWB-PCI3202DESCRIPTION :Three port FireWire 800to PCI Host AdapterRevision :1.1.1CUSTOMERAPPROVEDAPPROVALENGINNERߍ ۵Њѣࢨ̳ΦέΔᎩາ ظ ξᚗ ྮ346 ޒ 236ཱི5ሁ4F, No.125, Lane 235, Pao Chiao Road,Hsin Tian City, Taipei, Taiwan, R.O.C.TEL : 02-89191358 FAX : 02-89191359ISSUE BY
ContentsOverview:3- Introduction- Specification- Operating Systems Requirements- RoHS- Environmental Condition- Block DiagramSilk Screen and Picture4- Silk Screen of FWB-PCI3202 P.C.B.- Picture of FWB-PCI3202A PCBA- Picture of FWB-PCI3202B PCBAMechanical Dimension:7Parts Information:- ConnectorDatasheet of Bilingual ConnectorDatasheet of FireWire ConnectorDatasheet of Wafer Connector8910- Integrated CircuitDatasheet of TSB83AA23More Information on Website: http://www.ti.com/Certifications :- CE- FCCRoHS Declaration Letter:11
FWB-PCI3202 OverviewIntroduction:FWB-PCI3202 is a three port OHCI 1.1 Compliant FireWire 800 (IEEE-1394b) PCI Host Adapter featuring TexasInstruments OHCI 1.1 Compliant FireWire 800 (IEEE-1394b) Single Chip Host Controller.Highlight :- 32-bit PCI Host interface- Bilingual (1394b) connector (with screw lock)- Big IDE 4-pin DC Power Connector for supplying power to the 1394 BusSpecification:Host Bus:- 33-MHz/32-Bit PCI Interface- 3.3-V and 5-V PCI Signaling EnvironmentIEEE 1394 Std Support:- Fully Supports Provisions of IEEE P1394b Revision 1.33 at 1-GigabitSignaling Rates- Fully Supports Provisions of IEEE 1394a.2000 and 1394.1995 Standard forHigh Performance Serial Bus- Fully Interoperable With Firewire., i.LINK., and SB1394., Implementation ofIEEE Std 13941394 Bus Transfer Rate:Provides three fully backward-compatible, (IEEE Std 1394a-2000 fullycompliant) Bilingual IEEE Std 1394b-2002 cable ports at S100/S200/S400/S400B/S800 megabits per second (Mbits/s).IEEE-1394 to PCI Controller:DV and DA Enhancement:Power Management:Number of ports:Bus Power Connector:Texas Instruments TSB83AB23- Digital Video and Audio performance enhancements.- Extended resume signaling for compatibility with legacy DV components.Power-down features to conserve energy in battery-powered applicationsinclude: automatic device power down during suspend, PCI powermanagement for link-layer, and inactive ports powered downFWB-PCI3202B: Three External Bilingual Ports (with screw lock)FWB-PCI3202A: Two External Bilingual Ports (with screw lock) One FireWire PortBig IDE 4-pin DC Power ConnectorOperating Systems Requirements:The 1394b function (host driver) is supported (built in) by the following OS:- Windows 2000 SP4 or later- Windows XP SP2 or later- Windows Vista SP1 or later- Mac OS 10.4 or later- Linux kernel 2.6.23 or later.RoHS:This Host Adapter is satisfied with RoHS regulations. Material of solder is satisfied with following definition.Material of solderSolder PasteSN-3.0AG-0.5CUFlow and hand soldering SN-0.7CU NIEnvironmental Condition:Operating free-air temperature: 0 65 degree CStorage temperature range: -20 100 degree CHumidity Operating : 0 80% RH, Non-condensing3
Block Diagram :54312FireWire 800 (1394b 1394a) to PCI (32bit/33MHz) Host AdapterDV1.0 -- V1.1PCI 12V1. 1394b Connector footprint for both CO-M0092 and CO-M01032. Delete C2, C102, C111 C118, C127 C129, D4 D10, L2, R49DC INBUSPOWERSwitchingRegulatorPHY POWERTPA0 , TPA0TPB0 , TPB0-LLC1 8VCDC JackPOWER CONNECTORBUSPOWERCPCI VIOPCI 5VVCC 3 3VRegulatorPCI 32bit/33MHzPCI 32bit/33MHz GOLD FINGERD1394b Bilingualor FireWirePORT1Ti TSB83AA23BB139 Ball FSBGASerialEEPROMTPA1 , TPA1TPB1 , TPB1-1394b BilingualPORT2TPA2 , TPA2TPB2 , TPB2-1394b BilingualPORT3IOI Technology Corp.AOSC98.304 MHzFWB-PCI3202 --- TSB83AA23 1394B PCI Adapter CardSizeADate:54ATitlePower Class43Document NumberTuesday, April 29, 20082Silk Screen and PicturesSilk Screen of FWB-PCI3202 P.C.B. :4Rev1.1FWB-PCI3202 - Cover page/Block DiagramSheet1of16
Picture of FWB-PCI3202A spevdujpo!Op/CPN!Sfw/HVJE!Op/5
Picture of FWB-PCI3202B spevdujpo!Op/CPN!Sfw/HVJE!Op/6
Mechanical Dimension7
Datasheet of Bilingual Connector8
Datasheet of FireWire Connector9
Datasheet of Wafer Connector # #3117/ 9/ 29œŰʼnŔD5.2225.15XSD i f s o h X f f j U f d i o p m p h z D psq/D5.2225.15XS:5/23/39PDF created with FinePrint pdfFactory Pro trial version http://www.fineprint.com10
TSB83AA23 IEEE Std 1394b-2002PHY and OHCI Link Devicewww.ti.comSLLS787 – FEBRUARY 20071Introduction1.1Features Fully Supports Provisions of IEEE Std1394b-2002 Revision 1.33 at 1-GigabitSignaling RatesFully Supports Provisions of IEEE Std1394a-2000 and IEEE Std 1394-1995 forHigh-Performance Serial BusFully Interoperable With Firewire , i.LINK ,and SB1394 Implementations of IEEE Std 1394Provides Three Fully Backward-Compatible,(IEEE Std 1394a-2000 Fully Compliant)Bilingual IEEE Std 1394b-2002 Cable Ports atup to 800 Megabits per Second (Mbps)Full IEEE Std 1394a-2000 Support Includes:– Connection Debounce– Arbitrated Short Reset– Multispeed Concatenation– Arbitration Acceleration– Fly-By Concatenation– Port Disable/Suspend/ResumeExtended Resume Signaling for CompatibilityWith Legacy DV DevicesPower-Down Features to Conserve Energy inBattery-Powered ApplicationsLow-Power Sleep ModeFully Compliant With Open Host ControllerInterface (OHCI) RequirementsCable Power Presence MonitoringCable Ports Monitor Line Conditions for ActiveConnection to Remote NodeRegister Bits Give Software Control ofContender Bit, Power-Class Bits, Link ActiveControl Bit, and IEEE Std 1394a-2000 FeaturesInteroperable With Other 1394 Physical Layers(PHYs) Using 1.8-V, 3.3-V, and 5-V SuppliesLow-Jitter, External Crystal Oscillator ProvidesTransmit and Receive Data at 100/200/400/800Mbps and Link-Layer Controller Clock at49.152 MHz and 98.304 MHzSeparate Bias (TPBIAS) for Each PortSoftware Device Reset (SWR) Fail-Safe Circuitry Senses Sudden Loss ofPower to the Device and Disables Ports toEnsure That TSB83AA23 Does Not LoadTPBIAS of Any Connected Device and BlocksAny Leakage From the Port Back to PowerPlaneIEEE Std 1394a-2000-CompliantCommon-Mode Noise Filter on Incoming BiasDetect Circuit to Filter Out Crosstalk NoisePort Programmable to Force IEEE Std1394a-2000 Mode to Allow Use of IEEE Std1394a-2000 Connectors (IEEE Std 1394b-2002Signaling Must Not Be Put Across IEEE Std1394a-2000 Connectors or Cables)3.3-V and 5-V PCI Signaling EnvironmentsSerial-Bus Data Rates of 100 Mbps, 200 Mbps,400 Mbps, and 800 MbpsPhysical Write Posting of up to ThreeOutstanding TransactionsSerial ROM or Boot ROM Interface Supports2-Wire Serial EEPROM Devices33-MHz/32-Bit PCI InterfaceMultifunction Terminal (MFUNC Terminal 1):– PCI CLKRUN Protocol Per PCI MobileDesign Guide– General-Purpose I/O (GPIO)– CYCLEIN/CYCLEOUT for External CycleTimer Control for CustomizedSynchronizationPCI Burst Transfers and Deep FIFOs toTolerate Large Host Latency– Transmit FIFO—5K Asynchronous– Transmit FIFO—2K Isochronous– Receive FIFO—2K Asynchronous– Receive FIFO—2K IsochronousD0, D1, D2, and D3 Power States and PMEEvents Per PCI Bus Power ManagementInterface SpecificationProgrammable Asynchronous TransmitThresholdIsochronous Receive Dual-Buffer ModeOut-of-Order Pipelining for AsynchronousTransmit RequestsPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this document.OHCI-Lynx is a trademark of Texas Instruments.Firewire is a trademark of Apple Computer, Inc.i.LINK is a trademark of Sony Kabushiki Kaisha TA Sony Corporation.All trademarks are the property of their respective owners.PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.Copyright 2007, Texas Instruments Incorporated
1394 Bus Transfer Rate: Provides three fully backward-compatible, (IEEE Std 1394a-2000 fully compliant) Bilingual IEEE Std 1394b-2002 cable ports at S100/S200/S400/ S400B/S800 megabits per second (Mbits/s). IEEE-1394 to PCI Controller: Texas Instruments TSB83AB23 DV and DA Enhancement: - Digital Video and Audio performance enhancements.
