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LTC3418OPERATIONMain Control LoopBurst Mode OperationThe LTC3418 is a monolithic, constant frequency, currentmode step-down DC/DC converter. During normal operation, the internal top power switch (P-channel MOSFET) isturned on at the beginning of each clock cycle. Current inthe inductor increases until the current comparator tripsand turns off the top power MOSFET. The peak inductorcurrent at which the current comparator shuts off the toppower switch is controlled by the voltage on the ITH pin.The error amplifier adjusts the voltage on the ITH pin bycomparing the feedback signal from a resistor divider onthe VFB pin with an internal 0.8V reference. When the loadcurrent increases, it causes a reduction in the feedbackvoltage relative to the reference. The error amplifier raisesthe ITH voltage until the average inductor current matchesthe new load current. When the top power MOSFET shutsoff, the synchronous power switch (N-channel MOSFET)turns on until either the bottom current limit is reached orthe beginning of the next clock cycle. The bottom currentlimit is set at –8A for force continuous mode and 0A forBurst Mode operation.Connecting the SYNC/MODE pin to a voltage in the rangeof 0V to 1V enables Burst Mode operation. In Burst Modeoperation, the internal power MOSFETs operate intermittently at light loads. This increases efficiency by minimizing switching losses. During Burst Mode operation, theminimum peak inductor current is externally set by thevoltage on the SYNC/MODE pin and the voltage on the ITHpin is monitored by the burst comparator to determinewhen sleep mode is enabled and disabled. When theaverage inductor current is greater than the load current,the voltage on the ITH pin drops. As the ITH voltage fallsbelow 350mV, the burst comparator trips and enablessleep mode. During sleep mode, the top power MOSFETis held off while the load current is solely supplied by theoutput capacitor. When the output voltage drops, the topand bottom power MOSFETs begin switching to bring theoutput back into regulation. This process repeats at a ratethat is dependent on the load demand.The operating frequency is externally set by an externalresistor connected between the RT pin and ground. Thepractical switching frequency can range from 300kHz to4MHz.Overvoltage and undervoltage comparators will pull thePGOOD output low if the output voltage comes out ofregulation by 7.5%. In an overvoltage condition, the toppower MOSFET is turned off and the bottom power MOSFETis switched on until either the overvoltage condition clearsor the bottom MOSFET’s current limit is reached.Forced ContinuousConnecting the SYNC/MODE pin to SVIN will disable BurstMode operation and force continuous current operation.At light loads, forced continuous mode operation is lessefficient than Burst Mode operation, but may be desirable insome applications where it is necessary to keep switchingharmonics out of a signal band. The output voltage rippleis minimized in this mode.8Pulse skipping operation can be implemented by connecting the SYNC/MODE pin to ground. This forces the burstclamp level to be at 0V. As the load current decreases, thepeak inductor current will be determined by the voltageon the ITH pin until the ITH voltage drops below 400mV. Atthis point, the peak inductor current is determined by theminimum on-time of the current comparator. If the loaddemand is less than the average of the minimum on-timeinductor current, switching cycles will be skipped to keepthe output voltage in regulation.Frequency SynchronizationThe internal oscillator of the LTC3418 can by synchronizedto an external clock connected to the SYNC/MODE pin.The frequency of the external clock can be in the rangeof 300kHz to 4MHz.For this application, the oscillator timing resistor shouldbe chosen to correspond to a frequency that is 25% lowerthan the synchronization frequency. During synchronization, the burst clamp is set to 0V, and each switching cyclebegins at the falling edge of the clock signal.3418fcFor more information www.linear.com/LTC3418

LTC3418OperationDropout OperationShort-Circuit ProtectionWhen the input supply voltage decreases toward the outputvoltage, the duty cycle increases toward the maximumon-time. Further reduction of the supply voltage forcesthe main switch to remain on for more than one cycleeventually reaching 100% duty cycle. The output voltagewill then be determined by the input voltage minus thevoltage drop across the internal P-channel MOSFET andthe inductor.When the output is shorted to ground, the inductor current decays very slowly during a single switching cycle.To prevent current runaway from occurring, a secondarycurrent limit is imposed on the inductor current. If theinductor valley current increases larger than 15A, the toppower MOSFET will be held off and switching cycles willbe skipped until the inductor current is reduced.Low Supply OperationThe LTC3418 is designed to operate down to an input supply voltage of 2.25V. One important consideration at lowinput supply voltages is that the RDS(ON) of the P‑channeland N-channel power switches increases. The user shouldcalculate the power dissipation when the LTC3418 is usedat 100% duty cycle with low input voltages to ensure thatthermal limits are not exceeded.Slope Compensation and Inductor Peak CurrentSlope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at duty cycles greater than 50%. It is accomplishedinternally by adding a compensating ramp to the inductorcurrent signal. Normally, the maximum inductor peakcurrent is reduced when slope compensation is added.In the LTC3418, however, slope compensation recoveryis implemented to keep the maximum inductor peak current constant throughout the range of duty cycles. Thiskeeps the maximum output current relatively constantregardless of duty cycle.Voltage TrackingSome microprocessors and DSP chips need two powersupplies with different voltage levels. These systems oftenrequire voltage sequencing between the core power supply and the I/O power supply. Without proper sequencing,latch-up failure or excessive current draw may occur thatcould result in damage to the processor’s I/O ports or theI/O ports of a supporting system device such as memory,an FPGA or a data converter. To ensure that the I/O loadsare not driven until the core voltage is properly biased,tracking of the core supply and the I/O supply voltage isnecessary.Voltage tracking is enabled by applying a ramp voltageto the TRACK pin. When the voltage on the TRACK pinis below 0.8V, the feedback voltage will regulate to thistracking voltage. When the tracking voltage exceeds 0.8V,control over the feedback voltage is gradually released.Full release of tracking control over the feedback voltageis achieved when the tracking voltage exceeds 1.05V.Voltage Reference OutputThe LTC3418 provides a 1.25V reference voltage that iscapable of sourcing up to 5mA of output current. Thisreference voltage is generated from a linear regulator andis intended for applications requiring a low noise referencevoltage. To ensure that the output is stable, the referencevoltage pin should be decoupled with a minimum of 2.2µF.3418fcFor more information www.linear.com/LTC34189

LTC3418APPLICATIONS INFORMATIONThe basic LTC3418 application circuit is shown on thefront page of this data sheet. External component selectionis determined by the maximum load current and beginswith the selection of the operating frequency and inductorvalue followed by CIN and COUT.Having a lower ripple current reduces the core losses inthe inductor, the ESR losses in the output capacitors andthe output voltage ripple. Highest efficiency operation isachieved at low frequency with small ripple current. This,however, requires a large inductor.Operating FrequencyA reasonable starting point for selecting the ripple currentis IL 0.4(IMAX). The largest ripple current occurs at thehighest VIN. To guarantee that the ripple current staysbelow a specified maximum, the inductor value shouldbe chosen according to the following equation:Selection of the operating frequency is a trade-off betweenefficiency and component size. High frequency operationallows the use of smaller inductor and capacitor values.Operation at lower frequencies improves efficiency byreducing internal gate charge losses but requires largerinductance values and/or capacitance to maintain lowoutput ripple voltage.The operating frequency of the LTC3418 is determinedby an external resistor that is connected between the RTpin and ground. The value of the resistor sets the rampcurrent that is used to charge and discharge an internaltiming capacitor within the oscillator and can be calculatedby using the following equation:R OSC 7.3 1010 Ω – 2.5kΩfAlthough frequencies as high as 4MHz are possible, theminimum on-time of the LTC3418 imposes a minimumlimit on the operating duty cycle. The minimum on-timeis typically 80ns. Therefore, the minimum duty cycle isequal to:100 80ns f(Hz)Inductor SelectionFor a given input and output voltage, the inductor valueand operating frequency determine the ripple current. Theripple current IL increases with higher VIN or VOUT anddecreases with higher inductance: V V ΔIL OUT 1– OUT VIN fL 10 VVL OUT 1– OUT fΔIL(MAX) VIN(MAX) The inductor value will also have an effect on Burst Modeoperation. The transition from low current operation begins when the peak inductor current falls below a levelset by the burst clamp. Lower inductor values result inhigher ripple current which causes this to occur at lowerload currents. This causes a dip in efficiency in the upperrange of low current operation. In Burst Mode operation,lower inductance values will cause the burst frequencyto increase.Inductor Core SelectionOnce the value for L is known, the type of inductor mustbe selected. Actual core loss is independent of core sizefor a fixed inductor value, but it is very dependent on theinductance selected. As the inductance increases, corelosses decrease. Unfortunately, increased inductancerequires more turns of wire and therefore copper losseswill increase.Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals canconcentrate on copper loss and preventing saturation.Ferrite core material saturates “hard,” which means thatinductance collapses abruptly when the peak design currentis exceeded. This results in an abrupt increase in inductorripple current and consequent output voltage ripple. Donot allow the core to saturate!3418fcFor more information www.linear.com/LTC3418

LTC3418APPLICATIONS INFORMATIONDifferent core materials and shapes will change the size/current and price/current relationship of an inductor. Toroidor shielded pot cores in ferrite or permalloy materials aresmall and don’t radiate much energy, but generally costmore than powdered iron core inductors with similarcharacteristics. The choice of which style inductor to usemainly depends on the price vs size requirements and anyradiated field/EMI requirements. New designs for surfacemount inductors are available from Coiltronics, Coilcraft,Toko and Sumida.CIN and COUT SelectionThe input capacitance, CIN, is needed to filter the trapezoidalwave current at the source of the top MOSFET. To preventlarge voltage transients from occurring, a low ESR inputcapacitor sized for the maximum RMS current should beused. The maximum RMS current is given by:I RMS I OUT(MAX)VOUTVINVIN–1VOUTThis formula has a maximum at VIN 2VOUT, where IRMS IOUT/2. This simple worst-case condition is commonly usedfor design because even significant deviations do not offermuch relief. Note that ripple current ratings from capacitormanufacturers are often based on only 2000 hours of lifewhich makes it advisable to further derate the capacitor,or choose a capacitor rated at a higher temperature thanrequired. Several capacitors may also be paralleled to meetsize or height requirements in the design.The selection of COUT is determined by the effective seriesresistance (ESR) that is required to minimize voltage rippleand load step transients as well as the amount of bulkcapacitance that is necessary to ensure that the controlloop is stable. Loop stability can be checked by viewingthe load transient response as described in a later section.The output ripple, VOUT, is determined by: 1 ΔVOUT ΔIL ESR 8fCOUT RMS current handling requirements. Dry tantalum, specialpolymer, aluminum electrolytic and ceramic capacitors areall available in surface mount packages. Special polymercapacitors offer very low ESR but have lower capacitancedensity than other types. Tantalum capacitors have thehighest capacitance density but it is important to onlyuse types that have been surge tested for use in switchingpower supplies. Aluminum electrolytic capacitors havesignificantly higher ESR, but can be used in cost-sensitiveapplications provided that consideration is given to ripplecurrent ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can havea high voltage coefficient and audible piezoelectric effects.The high Q of ceramic capacitors with trace inductancecan also lead to significant ringing.Using Ceramic Input and Output CapacitorsHigher values, lower cost ceramic capacitors are nowbecoming available in smaller case sizes. Their high ripplecurrent, high voltage rating and low ESR make them idealfor switching regulator applications. However, care mustbe taken when these capacitors are used at the input andoutput. When a ceramic capacitor is used at the input andthe power is supplied by a wall adapter through long wires,a load step at the output can induce ringing at the input,VIN. At best, this ringing can couple to the output and bemistaken as loop instability. At worst, a sudden inrushof current through the long wires can potentially causea voltage spike at VIN large enough to damage the part.When choosing the input and output ceramic capacitors,choose the X5R or X7R dielectric formulations. Thesedielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size.Output Voltage ProgrammingThe output voltage is set by an external resistive divideraccording to the following equation: R2 VOUT 0.8 1 R1 The output ripple is highest at maximum input voltagesince IL increases with input voltage. Multiple capacitorsplaced in parallel may be needed to meet the ESR andThe resistive divider allows pin VFB to sense a fraction ofthe output voltage as shown in Figure 1.3418fcFor more information www.linear.com/LTC341811

LTC3418APPLICATIONS INFORMATIONpin to ground. This sets IBURST to 0A. In this condition, thepeak inductor current is limited by the minimum on-timeof the current comparator; and the lowest output voltageripple is achieved while still operating discontinuously.During very light output loads, pulse skipping allows onlya few switching cycles to be skipped while maintainingthe output voltage in regulation.VFBLTC3418R1SGND3418 F01Figure 1. Setting the Output VoltageBurst Clamp ProgrammingIf the voltage on the SYNC/MODE pin is less than VIN by1V, Burst Mode operation is enabled. During Burst Modeoperation, the voltage on the SYNC/MODE pin determinesthe burst clamp level, which sets the minimum peak inductor current, IBURST, for each switching cycle. A graphshowing the relationship between the minimum peakinductor current and the voltage on the SYNC/MODE pincan be found in the Typical Performance Characteristicssection. In the graph, VBURST is the voltage on the SYNC/MODE pin. IBURST can only be programmed in the rangeof 0A to 10A. For values of VBURST less than 0.4V, IBURSTis set at 0A. As the output load current drops, the peakinductor currents decrease to keep the output voltage inregulation. When the output load current demands a peakinductor current that is less than IBURST, the burst clamp willforce the peak inductor current to remain equal to IBURSTregardless of further reductions in the load current. Sincethe average inductor current is greater than the output loadcurrent, the voltage on the ITH pin will decrease. Whenthe ITH voltage drops to 350mV, sleep mode is enabledin which both power MOSFETs are shut off and switchingaction is discontinued to minimize power consumption.All circuitry is turned back on and the power MOSFETsbegin switching again when the output voltage drops outof regulation. The value for IBURST is determined by thedesired amount of output voltage ripple. As the value ofIBURST increases, the sleep period between pulses and theoutput voltage ripple increase. The burst clamp voltage,VBURST, can be set by a resistor divider from the VFB pinto the SGND pin as shown in the Typical Application onthe front page of this data sheet.Pulse skipping, which is a compromise between low outputvoltage ripple and efficiency during low load current operation, can be implemented by connecting the SYNC/MODE12Voltage TrackingThe LTC3418 allows the user to program how its outputvoltage ramps during start-up by means of the TRACKpin. Through this pin, the output voltage can be set up toeither track coincidentally or ratiometrically follow anotheroutput voltage as shown in Figure 2. If the voltage on theTRACK pin is less than 0.8V, voltage tracking is enabled.During voltage tracking, the output voltage regulates tothe tracking voltage through a resistor divider network.VOUT2OUTPUT VOLTAGER2VOUT1TIME3418 F02aFigure 2a. Coincident TrackingVOUT2OUTPUT VOLTAGEVOUTVOUT1TIME3418 F02aFigure 2b. Ratiometric SequencingFor more information www.linear.com/LTC34183418fc

LTC3418APPLICATIONS INFORMATIONThe output voltage during tracking can be calculated withthe following equation: R2 VOUT VTRACK 1 ,VTRACK 0.8V R1 To implement the coincident tracking in Figure 2a, connect an extra resistor divider to the output of VOUT2 andconnect its midpoint to the TRACK pin of the LTC3418as shown in Figure 3. The ratio of this divider should beselected the same as that of VOUT1’s resistor divider. Toimplement the ratiometr

4500 3418 G06 1000 50 90 130 210 250 3000 3500 4000 VIN 3.3V Efficiency and Power Loss vs Load Current LOAD CURRENT (A) 0.01 EFFICIENCY (%) 60 POWER LOSS (mW) 80 100 0.1 1 10 3418 G09 40 50 70 90 30 20 1000 100000 100 10000 10 1 EFFICIENCY POWER LOSS VIN 3.3V VOUT 2.5V TA 25 C unless otherwise noted. Switch On-Resistance