WIXLIB

Antenna Characteristicswww.ti.comFigure 11. ANT2 PolarizationFigure 12. ANT2 PolarizationSWRU359D – September 2013 – Revised March 2015Submit Documentation FeedbackWL1835MODCOM8B WLAN MIMO and Bluetooth Module Evaluation Boardfor TI Sitara PlatformCopyright 2013–2015, Texas Instruments Incorporated13

Circuit Designwww.ti.com6.1SchematicWLAN EN SOCBT EN SOCWL UART DBGR10R 0402R20R 0402R4BT UART DBGR3J1HEADER 1x2H-1X2 2MM0R 040221Circuit DesignTP21TP110R 0402VBAT IN1TP8VIO INC210uF0603C11uF0402R320R0402C30.1uF0402SLOW 28291TP32930281TP43132343SLOW CLKR60R04022OUTGNDENVCCVIO INVBAT IN14C40.1uF0402WL RS232 TXWL RS232 RXGND2G4 ANT2 NDGND2G4 ANT1 WBThese two TPs for test modewhen WL IRQ pull high.R120R0402WL RS232 TX33R130R0402WL RS232 RX3536373824394023414222R170R0402BT FUNC2434421R190R0402BT 566676869707172737475767778798081822726251TP5182G4 ANT2 HEADER 1x2H-1X2 2MMShort PIN Header (1-2)for entering test mode.Open for function mode.WLAN EN SOCVIO INSDIO CLK WLSDIO CMD WLSDIO D0 WLSDIO D1 WLSDIO D2 WLSDIO D3 WLR100R0402WLAN IRQBT AUD CLKBT AUD FSYNCBT AUD INBT AUD OUTBT HCI TXBT HCI RXBT HCI CTSBT HCI RTSBT FUNC1BT UART DGNDGNDGNDGNDGNDGNDGNDGNDWLAN IRQGND3212343533GNDGNDGND363738VIOGNDEXT 32K4140434239GNDWLAN EN SOCBT EN SOCBT UART DBGWL UART 29G30G31G32G33G34G35G36GNDRESERVED31464GNDWL SDIO D363RESERVED1WL SDIO D2621GNDRESERVED2WL SDIO D1TP6GNDBT AUD CLK1361GPIO 4GND12600R 0402BT AUD FSYNC11R18BT AUD OUTWL SDIO D059BT AUD CLKU1WL1835MODGBE-13.4X13.3-N100 0.75-TOPBT AUD INGND589570R 0402GPIO 2100R 0402R16GNDWL SDIO CLKR15BT AUD FSYNCGPIO 1GNDBT AUD OUTGNDWL SDIO CMD56GND80R 0402BT HCI RX7R14GND655BT AUD INBT HCI TXGPIO1254GNDGPIO10530402BT HCI CTS5520RVBATGND0R 0402R11GNDGPIO9R9BT HCI RX2G4 ANT1 WBBT HCI RTSGPIO11BT HCI TXGNDGND514500R 040230R 0402R82R7BT HCI CTSVBAT4847WL UART DBGBT HCI RTSNU 0R04023OSC11V8 / 32.768kHzOSC-3.2X2.5J3HEADER 1x2H-1X2 2MM49R51R310R0402216VIO IN8384GPIO11R210R 0402WLAN IRQ8586GPIO9R220R 0402R230R0402SDIO D3 WL8788GPIO10R240R 0402R250R0402SDIO D2 WL8990GPIO12R260R 0402R270R0402SDIO D1 WL9192R290R0402SDIO D0 WL9394R300R0402SDIO CLK WL9596R280R0402SDIO CMD WL979899100R2010k0402BT EN SOCBT FUNC2GPIO11GPIO12GPIO10J2NU 100pin Micro Edge MEC6SD-100PEDGE CONNECTOR - MALEWL BG 1ANT-N3-1.6X0.8MM-BAFEEDC92pF04022.4G5GB2C7NU 10pF0402C610pF04022G4 ANT2 WA2G4 ANT1 WBC8NU 10pF0402C10NU pF0402B1C510pF0402B1WL BG/BT e 13. Schematic14WL1835MODCOM8B WLAN MIMO and Bluetooth Module Evaluation Board forTI Sitara PlatformCopyright 2013–2015, Texas Instruments IncorporatedSWRU359D – September 2013 – Revised March 2015Submit Documentation Feedback

Circuit Designwww.ti.com6.2Bill of Materials (BOM)Table 1 lists the bill of materials.Table 1. BOM1TI WL1835 Wi-Fi/Bluetooth ModuleWL18MODGBU12XOSC 3225 / 32.768 kHz / 1.8 V / 50 ppm7XZ3200005OSC13ANT / Chip / 2.4 GHz, 5 GHz / Peak Gain 5 dBiANT016008LCD2442MA1ANT1, ANT24CON Male 1x2 / PitchP301-SGP-040/028-02J1, J3, J45DC JUMPER / PITCH 2.0 mmCMJ-20BBJ1, J36Mini RF Header ReceptacleU.FL-R-SMT-1(10)J5, J67IND 0402 / 1.1 nH / 0.05 nH / SMDLQP15MN1N1W02L18IND 0402 / 1.5 nH / 0.05 nH / SMDLQP15MN1N5W02L29CAP 0402 / 1.2 pF / 50 V / C0G / 0.1 pFGJM1555C1H1R2BB01C1110CAP 0402 / 2.2 pF / 50 V / C0G / 0.1 pFGJM1555C1H2R2BB01C911CAP 0402 / 4 pF / 50 V / C0G / 0.1 pFGJM1555C1H4R0BB01C1412CAP 0402 / 8 pF / 50 V / C0G / 0.1 pFGJM1555C1H8R0BB01C1313CAP 0402 / 10 pF / 50 V / NPO / 5%0402N100J500LTC7, C814CAP 0402 / 0.1 µF / 6.3 V / X7R / 10%0402B104K100CTC3, C415CAP 0402 / 1 µF / 6.3 V / X5R / 10% / HFGRM155R60J105KE19DC116CAP 0603 / 10 µF / 6.3 V / X5R / 20%C1608X5R0J106MC217RES 0402 / 0R / 5%WR04X000 PTLR1, R2, R3, R4, R5, R6, R7, R8, R9,R10, R11, R12, R13, R14, R15,R16, R17, R18, R19, R21, R22,R23, R24, R25, R26, R27, R28,R29, R30, R31, R3218RES 0402 / 10K / 5%WR04X103 JTLR20SWRU359D – September 2013 – Revised March 2015Submit Documentation FeedbackWL1835MODCOM8B WLAN MIMO and Bluetooth Module Evaluation Boardfor TI Sitara PlatformCopyright 2013–2015, Texas Instruments Incorporated15

Layout Guidelines7Layout Guidelines7.1Board Layoutwww.ti.comFigure 14 shows the WL1835MODCOM8B 4-layer board. Table 2, Figure 15, Figure 16, Figure 17,Figure 18, and Figure 19 show instances of good layout practices.Figure 14. Layer 1Figure 15. Layer 216WL1835MODCOM8B WLAN MIMO and Bluetooth Module Evaluation Boardfor TI Sitara PlatformSWRU359D – September 2013 – Revised March 2015Submit Documentation FeedbackCopyright 2013–2015, Texas Instruments Incorporated

Layout Guidelineswww.ti.comFigure 16. Layer 3Figure 17. Layer 4Table 2. Module Layout GuidelinesReferenceGuideline Description1The proximity of ground vias must be close to the pad.2Signal traces must not be run underneath the module on the layer where the module is mounted.3Have a complete ground pour in layer 2 for thermal dissipation.4Have a solid ground plane and ground vias under the module for stable system and thermal dissipation.5Increase the ground pour in the first layer and have all of the traces from the first layer on the inner layers, ifpossible.6Signal traces can be run on a third layer under the solid ground layer, which is below the module mountinglayer.SWRU359D – September 2013 – Revised March 2015Submit Documentation FeedbackWL1835MODCOM8B WLAN MIMO and Bluetooth Module Evaluation Boardfor TI Sitara PlatformCopyright 2013–2015, Texas Instruments Incorporated17

Layout Guidelineswww.ti.comFigure 18. Module Layout Guidelines (Top Layer)Figure 19. Module Layout Guidelines (Bottom Layer)Figure 20 shows the trace design for the PCB. A 50-Ω impedance match on the trace to the antennashould be used. Also, 50-Ω traces are recommended for the PCB layout.18WL1835MODCOM8B WLAN MIMO and Bluetooth Module Evaluation Boardfor TI Sitara PlatformSWRU359D – September 2013 – Revised March 2015Submit Documentation FeedbackCopyright 2013–2015, Texas Instruments Incorporated

Layout Guidelineswww.ti.comFigure 20. Trace Design for the PCB LayoutFigure 21 shows layer 1 with the trace to the antenna over ground layer 2.Figure 21. Layer 1 Combined With Layer 2Table 3, Figure 22, and Figure 23 describe instances of good layout practices for the antenna and RFtrace routing.Table 3. Antenna and RF Trace Routing Layout GuidelinesReferenceGuideline Description1The RF trace antenna feed must be as short as possible beyond the ground reference. At this point, the tracestarts to radiate.2The RF trace bends must be gradual with an approximate maximum bend of 45 degrees with trace mitered. RFtraces must not have sharp corners.3RF traces must have via stitching on the ground plane beside the RF trace on both sides4RF traces must have constant impedance (microstrip transmission line).5For best results, the RF trace ground layer must be the ground layer immediately below the RF trace. Theground layer must be solid.6There must be no traces or ground under the antenna section.7RF traces must be as short as possible. The antenna, RF traces, and modules must be on the edge of the PCBproduct. The proximity of the antenna to the enclosure and the enclosure material must also be considered.SWRU359D – September 2013 – Revised March 2015Submit Documentation FeedbackWL1835MODCOM8B WLAN MIMO and Bluetooth Module Evaluation Boardfor TI Sitara PlatformCopyright 2013–2015, Texas Instruments Incorporated19

Layout Guidelineswww.ti.comFigure 22. Top Layer – Antenna and RF Trace Routing Layout GuidelinesFigure 23. Bottom Layer – Antenna and RF Trace Routing Layout Guidelines20WL1835MODCOM8B WLAN MIMO and Bluetooth Module Evaluation Boardfor TI Sitara PlatformSWRU359D – September 2013 – Revised March 2015Submit Documentation FeedbackCopyright 2013–2015, Texas Instruments Incorporated

Layout Guidelineswww.ti.comFigure 24 describes the MIMO antenna spacing. The distance of ANT1 and ANT2 must be greater thanhalf of wavelength (62.5 mm at 2.4 GHz).Figure 24. MIMO Antenna SpacingThe supply routing guidelines are as follows: For power supply routing, the power trace for VBAT must be at least 40-mil wide. The 1.8-V trace must be at least 18-mil wide. Make VBAT traces as wide as possible to ensure reduced inductance and trace resistance. If possible, shield VBAT traces with ground above, below, and beside the traces.The digital signals routing guidelines are as follows: SDIO signals traces (CLK, CMD, D0, D1, D2, and D3) should be routed in parallel to each other andas short as possible (less than 12 cm). In addition, every trace length must be the same as the others.There should be enough space between traces – greater than 1.5 times the trace width or ground – toensure signal quality, especially for the SDIO CLK trace. Remember to keep them away from theother digital or analog signal traces. TI recommends adding ground shielding around these buses. SDIO Clock, PCM clock These digital clock signals are a source of noise. Keep the traces of thesesignals as short as possible. Whenever possible, maintain a clearance around them.SWRU359D – September 2013 – Revised March 2015Submit Documentation FeedbackWL1835MODCOM8B WLAN MIMO and Bluetooth Module Evaluation Boardfor TI Sitara PlatformCopyright 2013–2015, Texas Instruments Incorporated21

Revision Historywww.ti.comThis user's guide revision history highlights the technical changes made to the SWRU359 device-specific user'sguide.Revision HistoryRevisionDateSWRS359CJanuary 2014SWRS359DMarch 2015Description / ChangesChanged all references of the module fromWL1835MODGB to WL18MODGB.In : Changed tested-temperature range from 0 – 70, to–20 – 70.Changed supply routing guidelines from 40-mm to 40-mil,18-mm to 18-milReformatted sections22Revision HistorySWRU359D – September 2013 – Revised March 2015Submit Documentation FeedbackCopyright 2013–2015, Texas Instruments Incorporated

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Video Conferencing Video Camera and Security 1.3 TI Module Key Benefits . 74 BT_FUNC1 O BT_HOST_WAKE_UP Signal to wake up the host from Bluetooth 75 N.C. No connection 76 BT_UART_DEBUG O Bluetooth Logger UART output 77 GND G Ground 78 GPIO9 I/O General-purpose I/O 79 N.C. No connection