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Hi3516C V200 Economical HD IP Camera SoCBrief Data SheetIssue02Date2015-12-28Downloaded from Arrow.com.
Copyright HiSilicon Technologies Co., Ltd. 2015. All rights reserved.No part of this document may be reproduced or transmitted in any form or by any means without priorwritten consent of HiSilicon Technologies Co., Ltd.Trademarks and Permissions,, and other HiSilicon icons are trademarks of HiSilicon Technologies Co., Ltd.All other trademarks and trade names mentioned in this document are the property of their respectiveholders.NoticeThe purchased products, services and features are stipulated by the contract made between HiSilicon andthe customer. All or part of the products, services and features described in this document may not bewithin the purchase scope or the usage scope. Unless otherwise specified in the contract, all statements,information, and recommendations in this document are provided "AS IS" without warranties, guaranteesor representations of any kind, either express or implied.The information in this document is subject to change without notice. Every effort has been made in thepreparation of this document to ensure accuracy of the contents, but all statements, information, andrecommendations in this document do not constitute a warranty of any kind, express or implied.HiSilicon Technologies Co., Ltd.Address:Huawei Industrial BaseBantian, LonggangShenzhen 518129People's Republic of @hisilicon.comDownloaded from Arrow.com.
Hi3516C V200Hi3516C V200 Economical HD IP Camera SoCBrief Data SheetKey SpecificationsProcessor CorezSecurity EngineARM926@600 MHz, 32 KB I-cache, 32 KB D-cacheVideo EncodingzzzzH.264 main/high profile L4.0H.264 baseline encodingMJPEG/JPEG baseline encodingzzzzzzzA maximum of 2-megapixel resolution for H.264encodingReal-time H.264 & JPEG encoding of multiple streams:1080p@30 fps VGA@30 fps 1080p@1 fps JPEGsnapshot2 megapixels@5 fps JPEG snapshotCBR or VBR with the output bit rate ranging from 2 kbit/sto 100 Mbit/sEncoding frame rate ranging from 1/16 fps to 30 fpsEncoding of eight ROIsOSD overlaying of eight regions before encodingIntelligent Video AnalysiszIntegrated IVE, supporting various intelligent analysisapplications such as motion detection, perimeter defense,and video diagnosisVideo and Graphics ProcessingzzzzzzVideo pre-processing, including 3D denoising, imageenhancement, and edge enhancementAnti-flicker for output videos and graphics1/15x to 16x video scaling1/2x to 2x graphics scalingOSD overlaying of eight regions before encodingHardware graphics overlaying for videos at the video layerand graphics layer 1 during post-processingISPzzzzzzzzzz2x2 Pattern RGB-IR sensorAdjustable 3A (AE, AF, and AWB) functionsHighlight compensation, backlight compensation, gammacorrection, and color enhancementDefect pixel correction, denoising, and digital imagestabilizationAnti-fogLens distortion correctionPicture rotation by 90 or 270 Mirroring and flippingBuild-in WDR and tone mappingISP tuning tools for the PCzzzzVoice encoding/decoding complying with multipleprotocols by using softwareG.711, ADPCM, and G.726 protocols supportedEcho cancellation, noise suppression, and automatic gainzzzzDownloaded from Arrow.com.Integrated audio CODEC that supports 16-bit audio inputsand outputsMono-channel differential microphone input for reducingthe background noisesSingle-end inputI2S inputPeripheral InterfaceszzzzzzzzzPOROne integrated high-precision RTCOne 4-channel SAR ADCThree UART interfacesIR interfaces, I2C interfaces, SPI master interfaces, andGPIO interfacesFour PWM interfacesTwo SDIO interfaces, one of which supports SD 3.0One USB 2.0 interface that supports the host/device modeRMII in 10/100 Mbit/s full-duplex or half-duplex mode,TSO network acceleration, and PHY clock outputExternal Memory InterfaceszzzzIssue 02 (2015-12-28)VI interfaces 8-, 10-, 12-, or 14-bit RGB Bayer/RGB-IR inputs,maximum clock frequency of 100 MHz BT.601, BT.656, and BT.1120 VI interfaces 4-Lane MIPI/HiSPI/LVDS VI interfaces Compatibility with mainstream HD CMOS sensorsprovided by Sony, Aptina, OmniVision, andPanasonic Various sensor levels supported Programmable sensor clock output Maximum input resolution of 2 (1920*1080)megapixelsVO interfaces One BT.656 VO interface supporting 8-bit serial LCDoutputsAudio InterfacesAudio Encoding/DecodingzAES, DES, 3DES, and RSA encryption/decryptionalgorithms implemented by hardwareHash digest tamper proofing implemented by hardwareIntegrated 512-bit OTP storage space and hardwarerandom number generatorVideo InterfacesVideo Encoding PerformancezzDDR interface 16-bit DDR2/DDR3/DDR3L interface Maximum frequency of 400 MHz Maximum capacity of 4 GbitsSPI NOR flash interface 1-, 2-, or 4-bit SPI NOR flash interfaceSPI NAND flash interface Maximum capacity of 4 GbitseMMC 5.0 interfaceHiSilicon Proprietary and ConfidentialCopyright HiSilicon Technologies Co., Ltd1
Hi3516C V200Hi3516C V200 Economical HD IP Camera SoCBrief Data Sheetz Maximum capacity of 64 GBBooting from the SPI NOR flash, SPI NAND flash, oreMMCSDKzzLinux 3.4-based SDKHigh-performance H.264 PC decoding libraryPhysical SpecificationszzzPower consumption Typical power consumption of 700 mW Multi-level power saving modeOperating voltages 1.1 V core voltage 3.3 V I/O voltage and 3.8 V margin voltagePackage Body size of 12 mm x 12 mm (0.47 in. x 0.47 in.),0.65 mm (0.03 in.) ball pitch, TFBGA RoHS packagewith 273 pinsIssue 02 (2015-12-28)Downloaded from Arrow.com.HiSilicon Proprietary and ConfidentialCopyright HiSilicon Technologies Co., Ltd2
Hi3516C V200Hi3516C V200 Economical HD IP Camera SoCBrief Data SheetFunctional Block DiagramImage SubsystemARM SubsystemDDRCARM926@600MHz(32K ICache/32K DCache)TDE IVEVPSS A3.0 BUSeMMCRTCVideo SubsystemMACUSB 2.0Host/DeviceAudioCODECH264 C V200 is a new-generation SoC designed for the HD IP camera. It has an integrated new-generation ISP and H.264 encoder.It uses the optimized picture processing algorithm before encoding, advanced low-power technology, and low-power architecturedesign. These designs and functions enable Hi3516C V200 to feature industry-leading low bit rate, high picture quality, and lowpower consumption. It supports 90 or 270 rotation and lens distortion correction by using hardware, which meets requirements invarious surveillance application scenarios. It also supports 3A algorithms, which allow customers to design various types of IPcameras including the movement of the integrated camera. Hi3516C V200 integrates the POR, RTC as well as audio CODEC andsupports various sensor levels and clock outputs, which significantly reduces the EBOM costs for the Hi3516C V200 HD IP camera.Similar to other HiSilicon DVR and NVR SDKs, the Hi3516C V200 SDK supports rapid mass production and the system layout ofIP cameras, DVRs, and NVRs.Issue 02 (2015-12-28)Downloaded from Arrow.com.HiSilicon Proprietary and ConfidentialCopyright HiSilicon Technologies Co., Ltd3
Hi3516C V200Hi3516C V200 Economical HD IP Camera SoCBrief Data SheetHi3516C V200 Economical HD IP Camera SolutionIssue 02 (2015-12-28)Downloaded from Arrow.com.HiSilicon Proprietary and ConfidentialCopyright HiSilicon Technologies Co., Ltd4
Hi3516C V200Hi3516C V200 Economical HD IP Camera SoCBrief Data SheetAcronyms and Abbreviations3DEStriple data encryption standardADPCMadaptive differential pulse code modulationAEautomatic exposureAESadvanced encryption standardAFautomatic focusAWBautomatic white balanceCBRconstant bit rateCODECcoder/decoderDDRdouble data rateDESdata encryption standardDVRdigital video recorderEBOMengineering bill of materialseMMCembedded multimedia cardGPIOgeneral-purpose input/outputHDhigh definitionHiSPIhigh-speed serial pixel interfaceI2Cinter-integrated circuitI2Sinter-IC soundIRinfraredISPimage signal processorIVEintelligent video engineLCDliquid crystal displayLVDSlow-voltage differential signalingMIPImobile industry processor interfaceNVRnetwork video recorderOSDon-screen displayOTPone-time programmingPORpower-on resetPWMpulse-width modulationIssue 02 (2015-12-28)Downloaded from Arrow.com.HiSilicon Proprietary and ConfidentialCopyright HiSilicon Technologies Co., Ltd5
Hi3516C V200Hi3516C V200 Economical HD IP Camera SoCBrief Data SheetRGBred-green-blueRMIIreduced media independent interfaceRoHSRestriction of Hazardous SubstancesROIregion of interestRSARivest-Shamir-AdlemanRTCreal-time clockSAR ADCsuccessive approximation register analog-to-digital converterSDIOsecure digital input/outputSDKsoftware development kitSDRAMsynchronous dynamic random access memorySoCsystem-on-chipSPIserial peripheral interfaceTFBGAthin & fine-pitch ball grid arrayTSOTCP segmentation offloadUARTuniversal asynchronous receiver transmitterVBRvariable bit rateVIvideo inputVOvideo outputWDRwide dynamic rangeIssue 02 (2015-12-28)Downloaded from Arrow.com.HiSilicon Proprietary and ConfidentialCopyright HiSilicon Technologies Co., Ltd6
protocols by using software z G.711, ADPCM, and G.726 protocols supported z Echo cancellation, noise suppression, and automatic gain Security Engine z AES, DES, 3DES, and RSA encryption/decryption algorithms implemented by hardware z Hash digest tamper proofing implemented by hardware z Integrated 512-bit OTP storage space and hardware
