Datasheet - STM32G474xB STM32G474xC STM32G474xE - Arm .

Transcription

STM32G474xB STM32G474xCSTM32G474xEArm Cortex -M4 32b MCU FPU, up to 512 KB Flash, 170 MHz / 213 DMIPS,128 KB SRAM, rich analog, math accelerator, 184ps 12ch Hi-res timerDatasheet - production dataFeatures Core: Arm 32-bit Cortex -M4 CPU with FPU,Adaptive real-time accelerator (ARTAccelerator) allowing 0-wait-state executionfrom Flash memory, frequency up to 170 MHzwith 213 DMIPS, MPU, DSP instructions Operating conditions:– VDD, VDDA voltage range:1.71 V to 3.6 V Mathematical hardware accelerators– CORDIC for trigonometric functionsacceleration– FMAC: Filter mathematical accelerator Memories– 512 Kbytes of Flash memory with ECCsupport, two banks read-while-write,proprietary code readout protection(PCROP), securable memory area, 1 KbyteOTP– 96 Kbytes of SRAM, with hardware paritycheck implemented on the first 32 Kbytes– Routine booster: 32 Kbytes of SRAM oninstruction and data bus, with hardwareparity check (CCM SRAM)– External memory interface for staticmemories FSMC supporting SRAM,PSRAM, NOR and NAND memories– Quad-SPI memory interface Reset and supply management– Power-on/power-down reset(POR/PDR/BOR)– Programmable voltage detector (PVD)– Low-power modes: sleep, stop, standbyand shutdown– VBAT supply for RTC and backup registers Clock management– 4 to 48 MHz crystal oscillator– 32 kHz oscillator with calibration– Internal 16 MHz RC with PLL option ( 1%)May 2019This is information on a product in full production.LQFP48 (7 x 7 mm)LQFP64 (10 x 10 mm)UFQFPN48(7 x 7 mm)WLCSP81(4.02 x 4.27 mm)LQFP80 (12 x 12 mm)LQFP100 (14 x 14 mm)LQFP128 (14 x 14 mm)TFBGA100(8 x 8 mmPitch 0.8)– Internal 32 kHz RC oscillator ( 5%) Up to 107 fast I/Os– All mappable on external interrupt vectors– Several I/Os with 5 V tolerant capability Interconnect matrix 16-channel DMA controller 25 x 12-bit ADCs 0.25 µs, up to 42 channels.Resolution up to 16-bit with hardwareoversampling, 0 to 3.6 V conversion range 7 x 12-bit DAC channels– 3 x buffered external channels 1 MSPS– 4 x unbuffered internal channels 15 MSPS 7 x ultra-fast rail-to-rail analog comparators 6 x operational amplifiers that can be used inPGA mode, all terminals accessible Internal voltage reference buffer (VREFBUF)supporting three output voltages (2.048 V,2.5 V, 2.95 V) 17 timers:– HRTIM (Hi-Resolution and complexwaveform builder): 6 x16-bit counters,184 ps resolution, 12 PWM– 2 x 32-bit timer and 2 x 16-bit timers withup to four IC/OC/PWM or pulse counterand quadrature (incremental) encoder input– 3 x 16-bit 8-channel advanced motorcontrol timers, with up to 8 x PWMDS12288 Rev 11/232www.st.com

STM32G474xB STM32G474xC STM32G474xE––––––channels, dead time generation andemergency stop1 x 16-bit timer with 2 x IC/OCs, oneOCN/PWM, dead time generation andemergency stop2 x 16-bit timers with IC/OC/OCN/PWM,dead time generation and emergency stop2 x watchdog timers (independent, window)1 x SysTick timer: 24-bit downcounter2 x 16-bit basic timers1 x low-power timer Calendar RTC with alarm, periodic wakeupfrom stop/standby– 5 x USART/UARTs (ISO 7816 interface,LIN, IrDA, modem control)– 1 x LPUART– 4 x SPIs, 4 to 16 programmable bit frames,2 x with multiplexed half duplex I2Sinterface– 1 x SAI (serial audio interface)– USB 2.0 full-speed interface with LPM andBCD support– IRTIM (infrared interface)– USB Type-C /USB power deliverycontroller (UCPD) True random number generator (RNG) Communication interfaces CRC calculation unit, 96-bit unique ID– 3 x FDCAN controller supporting flexible Development support: serial wire debugdata rate(SWD), JTAG, Embedded trace macrocell – 4 x I2C Fast mode plus (1 Mbit/s) with20 mA current sink, SMBus/PMBus,wakeup from stopTable 1. Device summaryReferencePart numberSTM32G474xBSTM32G474CB, STM32G474MB, STM32G474RB, STM32G474VB, STM32G474QBSTM32G474xCSTM32G474CC, STM32G474MC, STM32G474RC, STM32G474VC, STM32G474QCSTM32G474xESTM32G474CE, STM32G474ME, STM32G474RE, STM32G474VE, STM32G474QE2/232DS12288 Rev 1

STM32G474xB STM32G474xC STM32G474xEContentsContents1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.1Arm Cortex -M4 core with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.2Adaptive real-time memory accelerator (ART accelerator) . . . . . . . . . . . 173.3Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.4Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.5Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.6Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.7Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.8CORDIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.9Filter mathematical accelerator (FMAC) . . . . . . . . . . . . . . . . . . . . . . . . . . 213.10Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 223.11Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.11.1Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.11.2Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.11.3Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.11.4Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243.11.5Reset mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243.11.6VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253.12Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263.13Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283.14General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 293.15Direct memory access controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . 293.16DMA request router (DMAMux) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303.17Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303.183.17.1Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 303.17.2Extended interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . 30Analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313.18.1Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31DS12288 Rev 13/2326

Contents4/232STM32G474xB STM32G474xC STM32G474xE3.18.2Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . 323.18.3VBAT battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323.18.4Operational amplifier internal output (OPAMPxINT): . . . . . . . . . . . . . . . 323.19Digital to analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323.20Voltage reference buffer (VREFBUF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333.21Comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343.22Operational amplifier (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343.23Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343.24Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343.24.1High-resolution timer (HRTIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353.24.2Advanced motor control timer (TIM1, TIM8, TIM20) . . . . . . . . . . . . . . . 353.24.3General-purpose timers (TIM2, TIM3, TIM4, TIM5, TIM15, TIM16,TIM17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 363.24.4Basic timers (TIM6 and TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 363.24.5Low-power timer (LPTIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373.24.6Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373.24.7System window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . 373.24.8SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373.25Real-time clock (RTC) and backup registers . . . . . . . . . . . . . . . . . . . . . . 383.26Tamper and backup registers (TAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 383.27Infrared transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 393.28Inter-integrated circuit interface (I2C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 403.29Universal synchronous/asynchronous receiver transmitter (USART) . . . 413.30Low-power universal asynchronous receiver transmitter (LPUART) . . . . 423.31Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423.32Serial audio interfaces (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433.33Controller area network (FDCAN1, FDCAN2, FDCAN3) . . . . . . . . . . . . . 443.34Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443.35USB Type-C / USB Power Delivery controller (UCPD) . . . . . . . . . . . . . 443.36Clock recovery system (CRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 453.37Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . . 453.38Quad SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 463.39Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 463.39.1Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 463.39.2Embedded trace macrocell . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47DS12288 Rev 1

STM32G474xB STM32G474xC STM32G474xE45ContentsPinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 484.1UFQFPN48 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 484.2LQFP48 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 494.3LQFP64 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504.4LQFP80 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 514.5LQFP100 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 524.6LQFP128 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 534.7WLCSP81 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 544.8TFBGA100 pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 544.9Pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 554.10Alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 795.1Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 795.1.1Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 795.1.2Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 795.1.3Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 795.1.4Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 795.1.5Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 795.1.6Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 805.1.7Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 815.2Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 815.3Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 835.3.1General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 835.3.2Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 855.3.3Embedded reset and power control block characteristics . . . . . . . . . . . 855.3.4Embedded voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 875.3.5Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 885.3.6Wakeup time from low-power modes and voltage scalingtransition times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1205.3.7External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 1215.3.8Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 1265.3.9PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1295.3.10Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1305.3.11EMC characteristics . . . . . . . . . . . . . . . . . . .

Memories – 512 Kbytes of Flash memory with ECC support, two banks read-while-write, proprietary code readout protection (PCROP), securable memory area, 1 Kbyte OTP – 96 Kbytes of SRAM, with hardware parity check implemented on the first 32 Kbytes – Routine booster: 32 Kbytes of SRAM on instruction and data bus, with hardware parity check (CCM SRAM) – External memory interface for .