Transcription
STM32H753xI32-bit Arm Cortex -M7 400MHz MCUs, up to 2MB Flash,1MB RAM, 46 com. and analog interfaces, cryptoDatasheet - production dataFeaturesFBGACore 32-bit Arm Cortex -M7 core with doubleprecision FPU and L1 cache: 16 Kbytes of dataand 16 Kbytes of instruction cache; frequencyup to 400 MHz, MPU, 856 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1), and DSPinstructionsTFBGA240 25 (14x14 mm)TFBGA100 (8x8 mm)(1)FBGAUFBGA176 25 (10x10 mm)UFBGA169 (7x7 mm)LQFP208(28x28 mm)LQFP176(24x24 mm)LQFP144(20x20 mm)LQFP100(14x14 mm)Memories Up to 2 Mbytes of Flash memory with readwhile-write support 1.62 to 3.6 V application supply and I/Os 1 Mbyte of RAM: 192 Kbytes of TCM RAM (inc.64 Kbytes of ITCM RAM 128 Kbytes ofDTCM RAM for time critical routines),864 Kbytes of user SRAM, and 4 Kbytes ofSRAM in Backup domain Dedicated USB power embedding a 3.3 Vinternal regulator to supply the internal PHYs Embedded regulator (LDO) with configurablescalable output to supply the digital circuitry Dual mode Quad-SPI memory interfacerunning up to 133 MHz Voltage scaling in Run and Stop mode (5configurable ranges) Flexible external memory controller with up to32-bit data bus: SRAM, PSRAM,SDRAM/LPSDR SDRAM, NOR/NAND Flashmemory clocked up to 133 MHz inSynchronous mode Backup regulator ( 0.9 V) POR, PDR, PVD and BOR Voltage reference for analog peripheral/VREF Low-power modes: Sleep, Stop, Standby andVBAT supporting battery chargingLow-power consumption CRC calculation unit Total current consumption down to 4 µASecurity ROP, PC-ROP, active tamper, secure firmwareupgrade support, Secure access modeGeneral-purpose input/outputsClock management Internal oscillators: 64 MHz HSI, 48 MHzHSI48, 4 MHz CSI, 32 kHz LSI Up to 168 I/O ports with interrupt capability External oscillators: 4-48 MHz HSE,32.768 kHz LSEReset and power management 3 PLLs (1 for the system clock, 2 for kernelclocks) with Fractional mode 3 separate power domains which can beindependently clock-gated or switched off:– D1: high-performance capabilities– D2: communication peripherals and timers– D3: reset/clock control/power managementMay 2018This is information on a product in full production.Interconnect matrix 3 bus matrices (1 AXI and 2 AHB) Bridges (5 AHB2-APB, 2 AXI2-AHB)DocID030553 Rev 41/230www.st.com
STM32H753xI4 DMA controllers to unload the CPU 1 high-speed master direct memory accesscontroller (MDMA) with linked list support 2 dual-port DMAs with FIFO 1 basic DMA with request router capabilitiesUp to 35 communication peripherals 4 I2Cs FM interfaces (SMBus/PMBus) 4 USARTs/4x UARTs (ISO7816 interface,LIN, IrDA, up to 12.5 Mbit/s) and 1x LPUART 6 SPIs, 3 with muxed duplex I2S audio classaccuracy via internal audio PLL or externalclock, 1x I2S in LP domain (up to 133 MHz) 4x SAIs (serial audio interface) SPDIFRX interface 1 digital filters for sigma delta modulator(DFSDM) with 8 channels/4 filtersGraphics LCD-TFT controller up to XGA resolution Chrom-ART graphical hardware Accelerator (DMA2D) to reduce CPU load Hardware JPEG CodecUp to 22 timers and watchdogs 1 high-resolution timer (2.5 ns maxresolution) 2 32-bit timers with up to 4 IC/OC/PWM orpulse counter and quadrature (incremental)encoder input (up to 200 MHz) 2 16-bit advanced motor control timers (up to200 MHz) SWPMI single-wire protocol master I/F MDIO Slave interface 2 SD/SDIO/MMC interfaces (up to 125 MHz) 10 16-bit general-purpose timers (up to200 MHz) 2 CAN controllers: 2 with CAN FD, 1 withtime-triggered CAN (TT-CAN) 5 16-bit low-power timers (up to 200 MHz) 2 USB OTG interfaces (1FS, 1HS/FS) crystalless solution with LPM and BCD 1 SysTick timer Ethernet MAC interface with DMA controller 2 watchdogs (independent and window) RTC with sub-second accuracy & HW calendar HDMI-CECCryptographic acceleration 8- to 14-bit camera interface (up to 80 MHz) AES 128, 192, 256, TDES, HASH (MD5, SHA-1, SHA-2), HMAC11 analog peripherals 3 ADCs with 16-bit max. resolution (up to 36channels, 4.5 MSPS at 12 bits) True random number generatorsDebug mode 1 temperature sensor SWD & JTAG interfaces 2 12-bit D/A converters (1 MHz) 4-Kbyte Embedded Trace Buffer 2 ultra-low-power comparators 2 operational amplifiers (8 MHz bandwidth)96-bit unique IDAll packages are ECOPACK 2 compliantTable 1. Device summaryReferenceSTM32H753xI2/230Part numberSTM32H753VI, STM32H753ZI, STM32H753II, STM32H753BI, STM32H753XI,STM32H753AIDocID030553 Rev 4
STM32H753xIContentsContents1Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.1Arm Cortex -M7 with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.2Memory protection unit (MPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.3Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.3.1Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.3.2Secure access mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.3.3Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.4Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.5Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.5.1Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.5.2Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.5.3Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.6Low-power strategy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.7Reset and clock controller (RCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.7.1Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 233.7.2System reset sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243.8General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . . 243.9Bus-interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243.10DMA controllers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263.11Chrom-ART Accelerator (DMA2D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263.12Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 273.13Extended interrupt and event controller (EXTI) . . . . . . . . . . . . . . . . . . . . 273.14Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 273.15Flexible memory controller (FMC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283.16Quad-SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 283.17Analog-to-digital converters (ADCs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283.18Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293.19VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29DocID030553 Rev 43/2306
Contents4/230STM32H753xI3.20Digital-to-analog converters (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303.21Ultra-low-power comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 303.22Operational amplifiers (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303.23Digital filter for sigma-delta modulators (DFSDM) . . . . . . . . . . . . . . . . . . 313.24Digital camera interface (DCMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 323.25LCD-TFT controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333.26JPEG Codec (JPEG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333.27Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 333.28Cryptographic acceleration (CRYPT and HASH) . . . . . . . . . . . . . . . . . . . 343.29Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343.29.1High-resolution timer (HRTIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 363.29.2Advanced-control timers (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . 373.29.3General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373.29.4Basic timers TIM6 and TIM7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 383.29.5Low-power timers (LPTIM1, LPTIM2, LPTIM3, LPTIM4, LPTIM5) . . . . 383.29.6Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 383.29.7Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 383.29.8SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 383.30Real-time clock (RTC), backup SRAM and backup registers . . . . . . . . . . 393.31Inter-integrated circuit interface (I2C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 403.32Universal synchronous/asynchronous receiver transmitter (USART) . . . 403.33Low-power universal asynchronous receiver transmitter (LPUART) . . . . 413.34Serial peripheral interface (SPI)/inter- integrated sound interfaces (I2S) . 423.35Serial audio interfaces (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423.36SPDIFRX Receiver Interface (SPDIFRX) . . . . . . . . . . . . . . . . . . . . . . . . . 433.37Single wire protocol master interface (SWPMI) . . . . . . . . . . . . . . . . . . . . 433.38Management Data Input/Output (MDIO) slaves . . . . . . . . . . . . . . . . . . . . 443.39SD/SDIO/MMC card host interfaces (SDMMC) . . . . . . . . . . . . . . . . . . . . 443.40Controller area network (FDCAN1, FDCAN2) . . . . . . . . . . . . . . . . . . . . . 443.41Universal serial bus on-the-go high-speed (OTG HS) . . . . . . . . . . . . . . . 453.42Ethernet MAC interface with dedicated DMA controller (ETH) . . . . . . . . . 453.43High-definition multimedia interface (HDMI)- consumer electronics control (CEC) . . . . . . . . . . . . . . . . . . . . . . . . . . . 463.44Debug infrastructure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46DocID030553 Rev 4
STM32H753xIContents4Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 486Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 966.1Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 966.1.1Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 966.1.2Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 966.1.3Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 966.1.4Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 966.1.5Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 966.1.6Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 976.1.7Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 986.2Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 986.3Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1006.3.1General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1006.3.2VCAP external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1016.3.3Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . 1016.3.4Embedded reset and power control block characteristics . . . . . . . . . . 1026.3.5Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1036.3.6Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1046.3.7Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . 1176.3.8External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 1186.3.9Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 1226.3.10PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1246.3.11Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1256.3.12EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1276.3.13Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 1286.3.14I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 1296.3.15I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1306.3.16NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1366.3.17FMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1376.3.18Quad-SPI interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 1576.3.19Delay block (DLYB) characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 1596.3.2016-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1596.3.21DAC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1656.3.22Voltage reference buffer characteristics . . . . . . . . . . . . . . . . . . . . . . . 168DocID030553 Rev 45/2306
Contents7STM32H753xI6.3.23Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 1696.3.24VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1706.3.25Voltage booster for analog switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1706.3.26Comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1716.3.27Operational amplifiers characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 1726.3.28Digital filter for Sigma-Delta Modulators (DFSDM) characteristics . . . 1756.3.29Camera interface (DCMI) timing specifications . . . . . . . . . . . . . . . . . . 1786.3.30LCD-TFT controller (LTDC) characteristics . . . . . . . . . . . . . . . . . . . . . 1796.3.31Timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1816.3.32Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1826.3.33JTAG/SWD interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 196Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1997.1LQFP100 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1997.2TFBGA100, 8 x 8 x 0.8 mm thin fine-pitch ball grid arraypackage information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2037.3LQFP144 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2057.4UFBGA169 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2107.5LQFP176 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2117.6LQFP208 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2157.7UFBGA176 25 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 2197.8TFBGA240 25 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 2227.9Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2257.9.1Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2258Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2269Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2276/230DocID030553 Rev 4
STM32H753xIList of tablesList of tablesTable 1.Table 2.Table 3.Table 4.Table 5.Table 6.Table 7.Table 8.Table 9.Table 10.Table 11.Table 12.Table 13.Table 14.Table 15.Table 16.Table 17.Table 18.Table 19.Table 20.Table 21.Table 22.Table 23.Table 24.Table 25.Table 26.Table 27.Table 28.Table 29.Table 30.Table 31.Table 32.Table 33.Table 34.Table 35.Table 36.Table 37.Table 38.Table 39.Table 40.Table 41.Table 42.Table 43.Table 44.Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2STM32H753xI features and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14System vs domain low-power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23DFSDM implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34USART features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56STM32H753xI pin/ball definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57Port A alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82Port B alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83Port C alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85Port D alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87Port E alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88Port F alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89Port G alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90Port H alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92Port I alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93Port J alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94Port K alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100VCAP operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101Operating conditions at power-up / power-down (regulator ON) . . . . . . . . . . . . . . . . . . . 101Reset and power control block characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103Internal reference voltage calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104Typical and maximum current consumption in Run mode, code with data processingrunning from ITCM, regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105Typical and maximum current consumption in Run mode, code with data processingrunning from Flash memory, cache ON, regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . 106Typical and maximum current consumption in Run mode, code with data processingrunning from Flash memory, cache OFF, regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . 106Typical consumption in Run mode and corresponding performanceversus code position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107Typical current consumption batch acquisition mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107Typical and maximum current consumption in Sleep mode, regulator ON. . . . . . . . . . . . 107Typical and maximum current consumption in Stop mode, regulator ON. . . . . . . . . . . . . 108Typical and maximum current consumption in Standby mode . . . . . . . . . . . . . . . . . . . . . 108Typical and maximum current consumption in VBAT mode . . . . . . . . . . . . . . . . . . . . . . . 109Peripheral current consumption in Run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111Peripheral current consumption in Stop, Standby and VBAT mode . . . . . . . . . . . . . . . . . 116Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1194-48 MHz HSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121DocID030553 Rev 47/2309
List of tablesTable 45.Table 46.Table 47.Table 48.Table 49.Table 50.Table 51.Table 52.Table 53.Table 54.Table 55.Table 56.Table 57.Table 58.Table 59.Table 60.Table 61.Table 62.Table 63.Table 64.Table 65.Table 66.Table 67.Table 68.Table 69.Table 70.Table 71.Table 72.Table 73.Table 74.Table 75.Table 76.Table 77.Table 78.Table 79.Table 80.Table 81.Table 82.Table 83.Table 84.Table 85.Table 86.Table 87.Table 88.Table 89.Table 90.Table 91.Table 92.Table 93.Table 94.Table 95.Table 96.8/230STM32H753xIHSI48 oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123CSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124Main PLL characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125Flash memory programming (single bank configuration nDBANK 1) . . . . . . . . . . . . . . . 126Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132Output timing characteristics (HSLV OFF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133Output timing characteristics (HSLV ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings . . . . . . . . . . . . . . . . . 139Asynchronous non-multiplexed SRAM/PSRAM/NOR read - NWAIT timings . . . . . . . . . . 139Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings . . . . . . . . . . . . . . . . . 140Asynchronous non-multiplexed SRAM/PSRAM/NOR write - NWAIT timings. . . . . . . . . . 141Asynchronous multiplexed PSRAM/NOR read timings. . . . . . . . . . . . . . . . . . . . . . . . . . . 142Asynchronous multiplexed PSRAM/NOR read-NWAIT timings . . . . . . . . . . . . . . . . . . . . 142Asynchronous multiplexed PSRAM/NOR write timings . . . . . . . . . . . . . . . . . . . . . . . . . . 143Asynchronous multiplexed PSRAM/NOR write-NWAIT timings . . . . . . . . . . . . . . . . . . . . 144Synchronous multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . 146Synchronous multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148Synchronous non-multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . 149Synchronous non-multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150Switching characteristics for NAND Flash read cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . 153Switching characteristics for NAND Flash write cycles. . . . . . . . . . . . . . . . . . . . . . . . . . . 153SDRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154LPSDR SDRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155SDRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156LPSDR SDRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156Quad-SPI characteristics in SDR mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157Quad SPI characteristics in DDR mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158Dynamics characteristics: Delay Block characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 159ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161DAC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165DAC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166VREFBUF characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170VBAT charging characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170Voltage booster for analog switch characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170COMP characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171OPAMP characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172DFSDM measured timing 1.62-3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175DocID030553 Rev 4
STM32H753xITable 97.Table 98.Table 99.Table 100.Table 101.Table 102.Table 103.Table 104.Table 105.Table 106.Table 107.Table 108.Table 109.Table 110.Table 111.Table 112.Table 113.Table 114.Table 115.Table 116.Table 117.Table 118.Table 119.Table 120.Table 121.Table 122.Table 123.Table 124.Table 125.Table 126.Table 127.Table 128.List of tablesDCMI characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178LTDC characteristics . . . .
Datasheet -production data Features Core 32-bit Arm Cortex -M7 core with double-precision FPU and L1 cache: 16 Kbytes of data and 16 Kbytes of instruction cache; frequency up to 400 MHz, MPU, 856 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1), and DSP instructions Memories Up to 2 Mbytes of Flash memory with read-while-write support
