WIXLIB

STM32F030x4 STM32F030x6 STM32F030x8List of tablesList of tablesTable 1.Table 2.Table 3.Table 4.Table 5.Table 6.Table 7.Table 8.Table 9.Table 10.Table 11.Table 12.Table 13.Table 14.Table 15.Table 16.Table 17.Table 18.Table 19.Table 20.Table 21.Table 22.Table 23.Table 24.Table 25.Table 26.Table 27.Table 28.Table 29.Table 30.Table 31.Table 32.Table 33.Table 34.Table 35.Table 36.Table 37.Table 38.Table 39.Table 40.Table 41.Table 42.Table 43.Table 44.Table 45.Table 46.Table 47.Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1STM32F030x device features and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Temperature sensor calibration values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Internal voltage reference calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21STM32F030x I2C implementation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21STM32F030x USART implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22STM32F030x SPI implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25Pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Alternate functions selected through GPIOA AFR registers for port A . . . . . . . . . . . . . . . 31Alternate functions selected through GPIOB AFR registers for port B . . . . . . . . . . . . . . . 32STM32F030x peripheral register boundary addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . 34Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 41Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Typical and maximum current consumption from VDD supply at VDD 3.6 . . . . . . . . . . . 43Typical and maximum current consumption from the VDDA supply . . . . . . . . . . . . . . . . . . 43Typical and maximum VDD consumption in Stop and Standby modes. . . . . . . . . . . . . . . . 44Typical and maximum VDDA consumption in Stop and Standby modes. . . . . . . . . . . . . . . 44Typical current consumption in Run mode, code with data processingrunning from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45Switching output I/O current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49HSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50LSE oscillator characteristics (fLSE 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52HSI14 oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56Electrical sensitivities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60I/O AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62DocID024849 Rev 15/886

List of tablesTable 48.Table 49.Table 50.Table 51.Table 52.Table 53.Table 54.Table 55.Table 56.Table 57.Table 58.Table 59.Table 60.Table 61.Table 62.Table 63.Table 64.6/88STM32F030x4 STM32F030x6 STM32F030x8ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64RAIN max for fADC 14 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67IWDG min/max timeout period at 40 kHz (LSI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68WWDG min-max timeout value @48 MHz (PCLK). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68I2C characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69I2C analog filter characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71LQFP64 – 10 x 10 mm 64 pin low-profile quad flat package mechanical data . . . . . . . . . . 75LQFP48 – 7 x 7 mm, 48-pin low-profile quad flat package mechanical data . . . . . . . . . . . 77LQFP32 – 7 x 7mm 32-pin low-profile quad flat package mechanical data . . . . . . . . . . . . 79TSSOP20 – 20-pin thin shrink small outline package mechanical data . . . . . . . . . . . . . . . 81Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87DocID024849 Rev 1

STM32F030x4 STM32F030x6 STM32F030x8List of figuresList of figuresFigure 1.Figure 2.Figure 3.Figure 4.Figure 5.Figure 6.Figure 7.Figure 8.Figure 9.Figure 10.Figure 11.Figure 12.Figure 13.Figure 14.Figure 15.Figure 16.Figure 17.Figure 18.Figure 19.Figure 20.Figure 21.Figure 22.Figure 23.Figure 24.Figure 25.Figure 26.Figure 27.Figure 28.Figure 29.Figure 30.Figure 31.Figure 32.Figure 33.Figure 34.Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15LQFP64 64-pin package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23LQFP48 48-pin package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24LQFP32 32-pin package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24TSSOP20 package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25STM32F030x memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48Low-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52TC and TTa I/O input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59Five volt tolerant (FT and FTf) I/O input characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 59I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66I2C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70SPI timing diagram - slave mode and CPHA 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72SPI timing diagram - slave mode and CPHA 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72SPI timing diagram - master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73LQFP64 – 10 x 10 mm 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . 75LQFP64 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76LQFP48 – 7 x 7 mm, 48 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . 77LQFP48 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78LQFP32 – 7 x 7mm 32-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . . 79LQFP32 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80TSSOP20 - 20-pin thin shrink small outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81TSSOP20 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82LQFP64 PD max vs. TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85DocID024849 Rev 17/887

Introduction1STM32F030x4 STM32F030x6 STM32F030x8IntroductionThis datasheet provides the ordering information and mechanical device characteristics ofthe STM32F030x microcontrollers.This STM32F030x4, STM32F030x6, and STM32F030x8 datasheet should be read inconjunction with the STM32F0xxxx reference manual (RM0091). The reference manual isavailable from the STMicroelectronics website www.st.com.For information on the ARM Cortex -M0 core, please refer to the Cortex -M0 TechnicalReference Manual, available from the www.arm.com website at the following opic /com.arm.doc.ddi0432c/index.html.8/88DocID024849 Rev 1

STM32F030x4 STM32F030x6 STM32F030x82DescriptionDescriptionThe STM32F030x microcontroller incorporates the high-performance ARM Cortex -M0 32bit RISC core operating at a 48 MHz frequency, high-speed embedded memories (up to64 Kbytes of Flash memory and up to 8 Kbytes of SRAM), and an extensive range ofenhanced peripherals and I/Os. All devices offer standard communication interfaces (up totwo I2Cs, up to two SPIs, and up to two USARTs), one 12-bit ADC, up to 6 general-purpose16-bit timers and an advanced-control PWM timer.The STM32F030x microcontroller operates in the -40 to 85 C temperature range, from a2.4 to 3.6 V power supply. A comprehensive set of power-saving modes allows the design oflow-power applications.The STM32F030x microcontroller includes devices in four different packages ranging from20 pins to 64 pins. Depending on the device chosen, different sets of peripherals areincluded. The description below provides an overview of the complete range ofSTM32F030x peripherals proposed.These features make the STM32F030x microcontroller suitable for a wide range ofapplications such as application control and user interfaces, handheld equipment, A/Vreceivers and digital TV, PC peripherals, gaming platforms, e-bikes, consumer appliances,printers, scanners, alarm systems, video intercoms, and HVACs.DocID024849 Rev 19/8811

DescriptionSTM32F030x4 STM32F030x6 STM32F030x8Table 2. STM32F030x device features and peripheral countsPeripheralSTM32F030F4STM32F030K6Flash (Kbytes)1632326464SRAM (Kbytes)444884 (16-bit)(1)5 (16-bit)5 lpurposeSTM32F030C6/C81 (16-bit)4 (16-bit)(1)4 (16-bit)(1)Basic---1 (16-bit)1 (4)22USART12-bit synchronized ADC(number of channels)GPIOs11(11 channels)1(12 channels)1(12 channels)1(18 channels)15263955Max. CPU frequency48 MHzOperating voltage2.4 to 3.6 VOperating temperaturePackagesAmbient operating temperature: -40 C to 85 CTSSOP20LQFP321. TIM15 is not present.2. SPI2 is not present.3. I2C2 is not present.4. USART2 is not present.10/88STM32F030R8DocID024849 Rev 1LQFP48LQFP64

STM32F030x4 STM32F030x6 STM32F030x8DescriptionFigure 1. Block WDIOas AFSRAMcontrollerNVICBus matrixCORTEX-M0 CPUfHCLK 48 MHzFlashup to64 KB,32 bitsSRAM4 / 8 KBPOWERVOLT.REG3.3 V TO 1.8 VVDD 2.4 to 3.6 VVSS@ VDDPORResetIntSUPPLYSUPERVISIONPOR/PDR@ VDDANRSTVDDAVDDRC HS 14 MHzRC HS 8 MHz@ VDDAGP DMA5 channelsRC LSPLLGPIO port APB[15:0]GPIO port BPC[15:0]GPIO port CPD2GPIO port DPF[1:0]PF[7:4]GPIO port FAHB decoderPA[15:0]RESET RCAHB@ VDDXTAL OSC4-32 MHzIWDGPowerController@ VDDXTAL32 kHzOSC32 IN (PC14)OSC32 OUT (PC15)RTCTAMPER-RTC(ALARM OUT)RTC interfaceTIMER 14 channels3 compl. channelsBRK, ETR input as AFTIMER 34 ch., ETR as AFTIMER 141 channel as AFTIMER 152 channels1 compl, BRK as AFTIMER 161 channel1 compl, BRK as AFTIMER 171 channel1 compl, BRK as AFAPB55 AFEXT. ITWKUPWWDGMOSI,MISO,SCK,NSS as AFMOSI/MISO,SCK/NSS,as AFSPI1OSC IN (PF0)OSC OUT (PF1)IR OUT as AFDBGMCUUSART1SPI2USART2RX, TX,CTS, RTS,CK as AFRX, TX,CTS, RTS,CK as AFSYSCFG IF@ VDDATemp.sensor16AD inputs12-bitADC1I2C 1SCL, SDA, SMBA(20 mA for FM ) as AFI2C2SCL, SDAas AFIFTIMER 6VDDAVSSAMSv32137V11. TIMER6, TIMER15, SPI2, USART2 and I2C2 are available on STM32F030x8 devices only.DocID024849 Rev 111/8811

Functional overviewSTM32F030x4 STM32F030x6 STM32F030x83Functional overview3.1ARM CortexTM-M0 core with embedded Flash and SRAMThe ARM Cortex -M0 processor is the latest generation of ARM processors for embeddedsystems. It has been developed to provide a low-cost platform that meets the needs of MCUimplementation, with a reduced pin count and low-power consumption, while deliveringoutstanding computational performance and an advanced system response to interrupts.The ARM Cortex -M0 32-bit RISC processor features exceptional code-efficiency,delivering the high-performance expected from an ARM core in the memory size usuallyassociated with 8- and 16-bit devices.The STM32F0xx family has an embedded ARM core and is therefore compatible with allARM tools and software.Figure 1 shows the general block diagram of the device family.3.2MemoriesThe device has the following features: Up to 8 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0wait states and featuring embedded parity checking with exception generation for failcritical applications. The non-volatile memory is divided into two arrays:–16 to 64 Kbytes of embedded Flash memory for programs and data–Option bytesThe option bytes are used to write-protect the memory (with 4 KB granularity) and/orreadout-protect the whole memory with the following options:3.3–Level 0: no readout protection–Level 1: memory readout protection, the Flash memory cannot be read from orwritten to if either debug features are connected or boot in RAM is selected–Level 2: chip readout protection, debug features (Cortex-M0 serial wire) and bootin RAM selection disabledBoot modesAt startup, the boot pin and boot selector option bit are used to select one of three bootoptions: Boot from User Flash Boot from System Memory Boot from embedded SRAMThe boot loader is located in System Memory. It is used to reprogram the Flash memory byusing USART on pins PA14/PA15 or PA9/PA10.12/88DocID024849 Rev 1

STM32F030x4 STM32F030x6 STM32F030x83.4Functional overviewCyclic redundancy check calculation unit (CRC)The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bitdata word and a CRC-32 (Ethernet) polynomial.Among other applications, CRC-based techniques are used to verify data transmission orstorage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means ofverifying the Flash memory integrity. The CRC calculation unit helps compute a signature ofthe software during runtime, to be compared with a reference signature generated at linktime and stored at a given memory location.3.5Power management3.5.1Power supply schemes VDD 2.4 to 3.6 V: external power supply for I/Os and the internal regulator. Providedexternally through VDD pins. VDDA 2.4 to 3.6 V: external analog power supply for ADC, Reset blocks, RCs andPLL. The VDDA voltage level must be always greater or equal to the VDD voltage leveland must be provided first.For more details on how to connect power pins, refer to Figure 10: Power supply scheme.3.5.2Power supply supervisorsThe device has integrated power-on reset (POR) and power-down reset (PDR) circuits.They are always active, and ensure proper operation above a threshold of 2 V. The deviceremains in reset mode when the monitored supply voltage is below a specified threshold,VPOR/PDR, without the need for an external reset circuit.3.5.3 The POR monitors only the VDD supply voltage. During

Calendar RTC with alarm and periodic wakeup from Stop/Standby Communication interfaces - Up to two I2C interfaces: one supporting Fast Mode Plus (1 Mbit/s) with 20 mA current sink - Up to two USARTs supporting master synchronous SPI and modem control; one with auto baud rate detection - Up to two SPIs (18 Mbit/s) with 4 to 16