Transcription
PERFORMANCE ANALYSIS OF OPENFLOW HARDWAREMichiel AppelmanMaikel de BoerSupervisor: Ronald van der Pol (SARA)
PERFORMANCE ANALYSIS OF OPENFLOW HARDWAREMichiel AppelmanMaikel de BoerSupervisor: Ronald van der Pol (SARA)
AGENDA Experiments Conclusion Installing Questionsflows Performanceoverhead Lookupprocedure Failoverspeed DoS Presentation Questions 21controller3slidesapproximately 20 minutesapproximately 5 minutes
RESEARCH QUESTION“How can the scalability of OpenFlow switches be explained by their hardware design?”4
EXPERIMENTSHardware- Pronto 3290- Xorplus- Pica8- Open vSwitch- NetFPGA Gigabit Card- Anritsu MD1230A Ethernet Traffic Tester5
EXPERIMENTSInstalling flowsSwitchControllerConnect()Listen()Hello- Types of flowsHello- Initial hand-shakeFeatures RequestFeatures Reply- Install flows rapidlyVendorErrorFlow Mod(OpenFlow packets exchanged)6Request to delete allexcising flows
EXPERIMENTSInstalling flowsThree tries installing the maximum amount of flowsPica8 OpenFlowNetFPGAInstall 1 linear flow4.3 ms0.8 msInstall 1 hash flow2.0 ms6.1 ms7
EXPERIMENTSPerformance overhead- Does OpenFlow add a big amount of latency when switching?8
EXPERIMENTSPerformance overheadPort 4 to port 3 Port 3 to port 4Max7.1 µs7.7 µsMin6.4 µs7.1 µs9
EXPERIMENTSPerformance overhead- Test packet send from Anritsu is notBCrecognized- 4 bytes are addedDA) AnritsuB) Ethernet hubC) Laptop running WiresharkD) OpenFlow switchE) OpenFlow controllerA10E
EXPERIMENTSPerformance overheadSend from AnritsuFrame 2: 60 bytesEthernet II, Src:Beckhoff 04:00:00Internet Protocol(10.1.5.4)Data (26 bytes)on wire (480 bits), 60 bytes captured (480 bits)Beckhoff 03:00:00 (00:01:05:03:00:00), Dst:(00:01:05:04:00:00)Version 4, Src: 10.1.5.3 (10.1.5.3), Dst: 8301000adf9c1100 08 00 45 0001 05 03 0a 0117 32 09 4e d189
EXPERIMENTSPerformance overheadReceived at laptopFrame 3: 68 bytes on wire (544 bits), 68 bytes captured (544 bits)Ethernet II, Src: Beckhoff 03:00:00 (00:01:05:03:00:00), Dst:Beckhoff 04:00:00 (00:01:05:04:00:00)Internet Protocol Version 4, Src: 10.1.5.3 (10.1.5.3), Dst: 10.1.5.4(10.1.5.4)Data (26 bytes)0000 00 01 05 04 00 00 00 01 05 03 00 00 08 00 45 000010 00 2e 00 00 40 00 40 00 1c c8 0a 01 05 03 0a 010020 05 04 f6 f6 28 28 00 0c ff 83 df 17 32 09 4e d10030 e7 cd d6 31 00 dc 8c 70 00 01 9c 89 30 6a da fd0040 1c df 44 2112
EXPERIMENTSLookup procedure4.5- Throughput and latency with different4NetFPGA99.9%Pica8100.0%Open vSwitchLatency (µs)frame sizes321100.0%0642565121024Frame size (bytes)131280 1518
EXPERIMENTSFailover speed- Mid-stream path switch- Implications Frame3loss1 Latency One measurement per second.14AB2231
EXPERIMENTSFailover speed- Mid-stream path switch- Implications Frame3loss1 Latency One measurement per second.15AB2231
EXPERIMENTSFailover speed100,000,000 frames sent at supported line rateNetFPGAPronto Pica8Pronto Open vSwitchFrame loss0122-1,740 - 1,898Sequence errors017.95216
EXPERIMENTSDoS controller- The controller becomes a critical andmaybe vulnerable component- Is it possible to flood the controller?17
EXPERIMENTSDoS controllerNetFPGA ProntoPica8No traffic1.37 msRandom stream 16.74 ms188.50 msN/A
CONCLUSIONResults1. Hardware design of ToR switches not yet optimized for OpenFlow2. Pronto adds unnecessary Ethernet trailer to frame3. Pronto unable to forward ARP when flooded with unknown flows19
CONCLUSIONRecommendations- Development ongoing- Interoperability between versions an issue- Benchmarking not an easy task.20
QUESTIONS?21
Internet Protocol Version 4, Src: 10.1.5.3 (10.1.5.3), Dst: 10.1.5.4 (10.1.5.4) Data (26 bytes) 0000 00 01 05 04 00 00 00 01 05 03 00 00 08 00 45 00 0010 00 2e 00 00 40 00 40 00 1c c8 0a 01 05 03 0a 01 . Hardware design of ToR switches not yet optimized for OpenFlow 2. Pronto adds unnecessary Ethernet trailer to frame 3. Pronto unable to .
