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4H- and 6H- Silicon Carbide in PowerMOSFET DesignByMd HasanuzzamanDepartment of Electrical & Computer EngineeringThe University of Tennessee, KnoxvilleApril 7, 20041Analog VLSI andDevices Laboratory

Agenda¾¾¾¾¾¾¾Overview of silicon carbideComparison of Si and SiC MOSFETVertical power MOSFET modelA proposed device structureMOSFET temperature modelResultsConclusions2Analog VLSI andDevices Laboratory

Why SiC?¾Large band gap and high meltingpoint enable high temperature deviceoperations¾Large break down field enable thefabrication of smaller and compacthigh voltage power devices¾Requires smaller cooling system dueto High thermal conductivity¾Extremely radiation hard¾Shows excellent reverse recoverycharacteristics¾Excellent mechanical propertiesmake SiC ideal for MEMS applications3High breakdownelectric fieldHigh thermalconductivityHigh power hightemperature deviceWidebandgapHigh currentdensityRadiationhardAnalog VLSI andDevices Laboratory

Why Not Silicon?¾Smaller band gap and lowmelting point enable mediumrange of temperature deviceoperations¾Due to lower thermalconductivity, requires largercooling system¾Smaller electric breakdownfield limit the device size andvoltage¾Shows high leakage currentOn-ResistanceSiCSiBreakdown VoltageElectric FieldThermalConductivityFig: Comparison of Si and SiC properties4Analog VLSI andDevices Laboratory

Physical & Electrical Properties of SiCPropertiesSi6H-SiC4H-SiCBandgap(eV )1.113.03.26Dielectric const.11.89.710Breakdown field(V/cm)6x1053.5x1063.5x106Saturated drift velocity(cm/sec)1x1072x1072x107Electron mobility(in bulk) (cm2/V-sec)1350370720a650c450951201.54.94.9Melting point (oC)142028302830Hardness (kg/mm2)1000-2310Hole mobility (inbulk) (cm2/V-sec)Thermal conductivity(W/cm-oK)a along a-axis, c along c-axis5Analog VLSI andDevices Laboratory

Comparison of Wide Bandgap MaterialsProperties¾SiC is unique because of itsnative oxide is SiO2 ,therefore easy to fabricatefield effect device¾Though Diamond has thebest material properties, it isnot suitable for conventionalelectronic device fabrication.¾It is very difficult to formoxide in GaN, it is suitable foropto-electronics devices64H-SiCGaNDiamondLattice constant (Å)3.073 a10.053 c4.513.57Thermal expansion (x10-6)oC-5.60.08Density (g/cm3)--3.51Melting point (oC)2830-4000Bandgap (eV)3.263.455.45Saturated electronvelocity (x107 cm/s)2.02.22.7Mobility (cm2/V-s)ElectronHoleBreakdown Voltage (x105V/cm)78050301250250 5022001600100Dielectric constant9.66115.5Resistivity (Ω-cm)-10101013Thermal conductivity(W/cm.K)4.91.320Hardness (kg/mm2)2130 a-10000Analog VLSI andDevices Laboratory

Power MOSFET design considerations¾Specific on-resistance has to bekept as low as possible¾Breakdown voltage has to increaseas design requirements¾Low specific on-resistance reducespower losses and increases efficiency¾Specific on-resistance increaseswith the increase of the breakdownvoltage¾A design trade-off has to be madebetween the specific on-resistanceand the voltage rating7VBr Ron spε .Ec22.q.N d4VBr2 ε .E c3 .µ nGSSOxiden RCHChannelRCHp-bodyp-bodyRD4H-SiC n- driftregionn DAnalog VLSI andDevices Laboratory

Power MOSFET design considerations (contd.)¾SiC devices demonstrate onehundredth times lower specific onresistance and ten times higherbreakdown voltage than the silicondevices for the same device dimensions¾Drift region thickness is ten timeslower in silicon carbide compared tosilicon device for same voltage rating¾Mass and volume of heat sink is 1520% smaller in case of silicon carbideWdrift 2VBrEcGSSOxiden RCHChannelRCHp-bodyp-body4H-SiC n- driftregionRDn D8Analog VLSI andDevices Laboratory

Comparison of Si & SiC Power MOSFETsGGSSSOxiden RCHSOxiden RCHChannelRCHp-bodyChannelRCHp-bodyn p-bodyp-bodyRDRD4H-SiC n- driftregionn n- driftregionDn DSi-MOSFETSiC-MOSFET & Heat sinkSiliconSilicon-Carbide100 m.Ω/cm21 m.Ω/cm2Drift Region Thickness100 µm10 µmOperating Temperature150oC500oCHeat Sink Volume & Mass100%80-85%Device size100%50%On-Resistance9Heat sink for Si devicesAnalog VLSI andDevices Laboratory

Future power electronics will be SiC !Today’sTechnologyAdvantages ofSilicon CarbideLarge energy lossesReduce loss by 10xLarge improvement inefficiencyLimited voltage andpower levelIncrease power 103xSimplify use in electricalgridLow operatingtemperature ( 150ºC)Increase range to 500ºCNew applications;eliminate massive heatsinksLarge heat sinks & filtersReduce size/weightby 3xLightweight, compactsystems10PayoffAnalog VLSI andDevices Laboratory

Potential applications of SiC ar power11AircraftAnalog VLSI andDevices Laboratory

Limitations of SiC¾Higher defect densities due tomicropipes and dislocations in thecrystal orientations¾Material processing and devicefabrication require hightemperature process (1000-1700oC)¾Device quality SiC wafer is verycostly¾High interface state densities¾Low inversion layer mobility¾Power MOSFETs in SiC are notcommercially availableMicropipes defects2.540DS 50 mV352W et NO30251.520115100.5Dry W et0051015205Mobility (cm2/Vs)Drain Current (µA)V025Gate Voltage (V)12Analog VLSI andDevices Laboratory

Atomic structure¾SiC are made bySiarrangement of covalentlybonded tetrahedral Si and CatomsCTetragonal bonding betweencarbon and silicon atoms¾50% carbon atoms and 50Locations of Si (light) and Catoms (dark) in SiC% silicon atoms¾SiC has more than 100Bknown polytypesA¾Polytype refers to a familyof material which hascommon stoichiometriciti b t tCSite locations for C atoms in (0001) plan13Analog VLSI andDevices Laboratory

Atomic structure (contd.)¾The arrangement of SiC bi-layersis same in 2-D but differs in bystacking sequence in 3-D¾3 commonly used polytypes:AB¾ 3C-SiC: Cubic structure, Zincblend, ABCABC .¾ 4H-SiC: Hexagonal closepacked, ABCBABCB ¾ 6H-SiC: Hexagonal closepacked, ABCACBABCAC ACBA3CACBACACCBBBBAAAA2H4H6HStacking sequences for four different SiC polytypes14Analog VLSI andDevices Laboratory

Device fabrication:the pathway to success¾Material Processing Epitaxial Growth Dopant Activation Interface EngineeringM aterialProcessing¾Device Fabrication¾Applications Circuit Design System IntegrationD eviceFabricationDesignFlowP otentialA pplications15Analog VLSI andDevices Laboratory

Drawback of lateral structure for power application¾ PowerMOSFETs have to handlehigh voltages and high currents¾Lateral structure is not suitable forpower application¾ Current flows laterally through thechannel below the gate oxide¾ No drift region available to holdlarge voltage¾ No option is available for forwardblocking capability¾ Required large W to get large W/Lratio to increase the current capacitySGDOXIDEn Channeln p-type substrateBLateral MOSFET Structure16Analog VLSI andDevices Laboratory

Vertical MOSFET for high voltage and high power¾Source and drain are made on top andbottom of the wafer respectivelyG¾ Current flows vertically from drain tosource through drift and channel regionSSOxiden Channelp-body¾ Drift region supports most of theapplied drain voltage¾Channel region provides the currentp-body4H-SiC n- driftregiongainn ¾ p-n junction between p-body and n-drift region provides forward blockingcapability17DVertical MOSFET StructureAnalog VLSI andDevices Laboratory

Vertical MOSFET for high voltage and high power¾P-bodies can be made either round orhexagonal shaped to get large WGS¾Length L can be made very smallSOxide¾For same die area, W/L ratio is highercompared to lateral MOSFET¾Drift region doping can be adjusted toget high breakdown voltage with low onresistancen Channelp-bodyp-body4H-SiC n- driftregionn ¾4H-SiC is suitable for vertical structuredue to higher mobility in verticaldirectionD18Analog VLSI andDevices Laboratory

Modeling of vertical DIMOS structure¾For analysis the structure is dividedinto two regions: (i) the channel region,and (ii) the drift region¾ Channel forms in the p-body belowthe gate oxide where gate voltagecontrols the channel currents¾ Drain current is divided into twochannel currents in two p-bodies on bothsides¾ Drift region begins at the drain andends at the channel near the oxide layerLGLpSSOxiden p-bodyRegion An p-bodyLsRegion BWjWdαWtRegion Cn DCross-section details of VDIMOSstructure used in the modelM Hasanuzzaman, S.K. Islam, L. Tolbert, and Burak Ozpineci,“Model Simulation and Verification of a VerticalDouble Implanted (DIMOS) Transistor in 4H-SiC”, proceedings of the IASTED international conference,February 24-26, 2003, Palm Spring, CA.19Analog VLSI andDevices Laboratory

Modeling of vertical DIMOS structure (contd.)¾Drift region is divided into threeregions¾ Region A: an accumulation regionbetween the p-bodies with smallcross-section¾ Region B: a drift region withvarying cross-section¾ Region C: a drift region withconstant cross-section¾ Current voltage relations forchannel region and three drift regionshave been developed20LGLpSSOxiden p-bodyRegion An p-bodyLsRegion BWdαWjWtRegion Cn DAnalog VLSI andDevices Laboratory

Modeling of vertical DIMOS structure (contd.)Channel CurrentI ch [Wµ neff2 L 1 ( µ neff / 2vsat L)VchVch [2Cox (VGS VT ) (Cox Cdo )Vch ]]LGLpSCox Cdo is the totalcapacitance of the oxide and the bodydepletionS¾ Where¾ Current increases with the decrease ofchannel length and increase in channelwidth and voltageOxiden p-bodyRegion An p-bodyLsRegion BWdαWjWtRegion Cn ¾ Gate voltage controls the channelcurrentD¾ At saturation, channel current is givenby,I ch ( sat ) Wvsat Cox (VGS VT )21Analog VLSI andDevices Laboratory

Modeling of vertical DIMOS structure (contd.)Drift Region VoltageTotal drift region voltage is thesum of the voltages of the threeregions,Vdrift VA VB VCWhere,LGSSOxiden p-bodyRegion AVA E y dy 0I D (W j W d )W ( L s qN d µ n ) I D / E C WqNd µ n (Ls 2LP ) I D / EC VB log WqNd µ n cotαWqNd Ls µ n I D / EC n p-bodyLsRegion BW j W dLpWdαWjWtRegion Cn IDVC DI D (Wt W j Wd LP tan α )WqN d µ n ( LS 2 LP ) I D Ec22Analog VLSI andDevices Laboratory

Results from the analytical model¾Voltage and current equations areµn-SiC 40 cm2/V.s,solved numerically because of theimplicit nature of the two sets ofequationstox 500 Åεox 3.9x8.854x10-12 F/cm¾ The parameter values of 4H-SiCare used to evaluate the drain currents¾ A number of output characteristicsare obtained for different gatevoltagesL 1 µm,Wt 25 µmLp 15 µm, Wj 5 µmLs 18 µmOutput Characteristics of vertical DIMOS with4H-SiC parametersVT 1V23Analog VLSI andDevices Laboratory

Results of analytical model(contd.)¾ Effectsof impurity concentrationsof drift region and narrow p-bodyspacing regions have been observedTransfer characteristic of Vertical DMOSfor different temperature¾ Gate loses its control over the draincurrent if velocity saturation occursbefore the drain pinches offDrain currents (Amp)1¾ Larger p-body separation reducesthe quasi-saturation effect0.75T 400oKoT 300 K0.5T 500oK0.25Crossover0¾ Lower impurity concentrations010203040Gate voltage (volts)increase the quasi-saturation effectTransfer Characteristics of VDIMOS with4H-SiC parameters¾ Transfer characteristics show aclear crossover with temperaturevariation at a gate voltage of 15V24Analog VLSI andDevices Laboratory

Model verification using ATLAS simulations¾Vertical MOSFET structure in 4H-SiC is proposed to verify the analyticalmodel¾ n-Drift is doped lightly (4.2x1015cm3) to hold the desired breakdownvoltage¾ n regions are doped (1.5x1020cm-3) with Nitrogen¾ p-body is formed by Aluminumimplantations (4x1017cm-3)¾ p-bodies are separated by 20µm¾ Oxide thickness is 500ž Drift region thickness is 20µm25GSSOxiden Channelp-bodyp-body4H-SiC n- driftregionn DVertical MOSFET Structure in 4H-SiCAnalog VLSI andDevices Laboratory