1. Introduction To Embedded System Design

Transcription

1. Introduction to Embedded SystemDesign Lothar ThieleETH Zurich, SwitzerlandSwiss FederalInstitute of Technology1-1Computer Engineeringand Networks Laboratory

Contents of Lectures (Lothar Thiele)1. Introduction to Embedded System Design2. Software for Embedded Systems3. Real-Time Scheduling4. Design Space Exploration5. Performance AnalysisThe slides contain material from the “Embedded System Design”Book and Lecture of Peter Marwedel and from the “HardReal-Time Computing Systems” Book of Giorgio Buttazzo.Swiss FederalInstitute of Technology1-2Computer Engineeringand Networks Laboratory

TopicsGeneral Introduction to Embedded SystemsHardware Platforms and Components! System Specialization! Application Specific Instruction Sets Micro Controller Digital Signal Processors and VLIW! Programmable Hardware! ASICs! System-on-ChipSwiss FederalInstitute of Technology1-3Computer Engineeringand Networks Laboratory

Embedded SystemsEmbedded systems (ES) information processingsystems embedded into a larger productExamples:Main reason for buying is not information processingSwiss FederalInstitute of Technology1-4Computer Engineeringand Networks Laboratory

Embedded Systemsexternal processhuman interfacesensors, actuatorsembedded systemSwiss FederalInstitute of Technology1-5Computer Engineeringand Networks Laboratory

Examples of Embedded SystemsCar as an integrated control-, communication and informationsystem.gear boxinformationABSmotor controlclimate controlSwiss FederalInstitute of Technology1-6Computer Engineeringand Networks Laboratory

Examples of Embedded SystemsConsumer electronics, for example MP3 Audio, digital camera, homeelectronics, .user interfaceprocessorsensorsactuatorsSwiss FederalInstitute of Technology1-7Computer Engineeringand Networks Laboratory

Examples of Embedded SystemsProduction systemsSwiss FederalInstitute of Technology1-8Computer Engineeringand Networks Laboratory

Examples of Embedded SystemsInformation systems, for example wireless communication (mobilephone, Wireless LAN, ), end-user equipment, router, Swiss FederalInstitute of Technology1-9Computer Engineeringand Networks Laboratory

Communicating Embedded SystemsExample: BTnodes (http://www.btnode.ethz.ch)! complete platform including OS! especially suited for pervasive computing applicationsSensorActuatorSwiss FederalInstitute of Technology1 - 10Computer Engineeringand Networks Laboratory

BTnode PlatformDataInterfacesMicroprocessorand MemorySwiss FederalInstitute of TechnologyCommunication viaBluetoothTransceivergeneric platformfor ad-hoccomputingcompleteplatformincluding OSespecially suitedfor pervasivecomputingapplications2nd RadioBatteries1 - 11Computer Engineeringand Networks Laboratory

Communicating Embedded Systems! sensor networks (civil engineering, buildings, environmentalmonitoring, traffic, emergency situations)! smart products, wearable/ubiquitous computingMICSSwiss FederalInstitute of Technology1 - 12Computer Engineeringand Networks Laboratory

Characteristics of Embedded Systems (1)Must be dependable:! Reliability: R(t) probability of system working correctlyprovided that is was working at t 0! Maintainability: M(d) probability of system workingcorrectly d time units after error occurred.! Availability: probability of system working at time t! Safety: no harm to be caused! Security: confidential and authentic communicationEven perfectly designed systems can fail if the assumptionsabout the workload and possible errors turn out to be wrong.Making the system dependable must not be an after-thought, itmust be considered from the very beginning.Swiss FederalInstitute of Technology1 - 13Computer Engineeringand Networks Laboratory

Characteristics of Embedded Systems (2)Must be efficient:!!!!!Energy efficientCode-size efficient (especially for systems on a chip)Run-time efficientWeight efficientCost efficientDedicated towards a certain application: Knowledge aboutbehavior at design time can be used to minimize resourcesand to maximize robustness.Dedicated user interface (no mouse, keyboard and screen).Swiss FederalInstitute of Technology1 - 14Computer Engineeringand Networks Laboratory

Characteristics of Embedded Systems (3)Many ES must meet real-time constraints:! A real-time system must react to stimuli from the controlledobject (or the operator) within the time interval dictated by theenvironment.! For real-time systems, right answers arriving too late (or eventoo early) are wrong.„A real-time constraint is called hard, if not meeting thatconstraint could result in a catastrophe“ [Kopetz, 1997].! All other time-constraints are called soft.! A guaranteed system response has to be explained withoutstatistical arguments.Swiss FederalInstitute of Technology1 - 15Computer Engineeringand Networks Laboratory

Characteristics of Embedded Systems (4)Frequently connected to physical environment throughsensors and actuators,Hybrid systems (analog digital parts).Typically, ES are reactive systems:„A reactive system is one which is in continual interactionwith is environment and executes at a pace determined bythat environment“ [Bergé, 1995]! Behavior depends on input and current state." automata model often appropriate,Swiss FederalInstitute of Technology1 - 16Computer Engineeringand Networks Laboratory

ComparisonEmbedded SystemsGeneral Purpose Computing! Few applications that areknown at design-time.! Not programmable by enduser.! Fixed run-time requirements(additional computing powernot useful).! Criteria: cost power consumption predictability Swiss FederalInstitute of Technology! Broad class of applications.! Programmable by end user.! Faster is better.! Criteria: cost average speed1 - 17Computer Engineeringand Networks Laboratory

TopicsGeneral Introduction to Embedded SystemsHardware Platforms and Components! System Specialization! Application Specific Instruction Sets Micro Controller Digital Signal Processors and VLIW! Programmable Hardware! ASICs! System-on-ChipSwiss FederalInstitute of Technology1 - 18Computer Engineeringand Networks Laboratory

Embedded System HardwareEmbedded system hardware is frequently used in a loop(„hardware in a loop“):this courseactuatorsembedded systemSwiss FederalInstitute of Technology1 - 19Computer Engineeringand Networks Laboratory

To Outside WorldTypical ArchitecturePeripheral BusDEBUG PortNon-volatile memory EPROM, FLASH, DISK Hybrid FPGA PALMicroprocessor 4, 8, 16, 32, 4 bit bus CISC, RISC, DSP Integrated peripherals Debug/Test Port Caches Pipeline Multiprocessing SystemsCustom Devices ASICVolatile Memory DRAM, SRAMStandard Devices I/O Ports Peripheral Controllers HybridCommunication Devices EthernetSystem ClocksSoftware Application Code Driver Code / BIOS Real Time Operating System User Interface Communications Protocol Stacks C, C , Assembly Language, ADA Legacy CodeSwiss FederalInstitute of Technology RTC circuitry System clocks Integrated in uC Imported/Exported RS-232 SCSI Centronics ProprietaryMicroprocessor Bus Custom PCI VME PC-1021 - 20Computer Engineeringand Networks Laboratory

TopicsGeneral Introduction to Embedded SystemsHardware Platforms and Components! System Specialization! Application Specific Instruction Sets Micro Controller Digital Signal Processors and VLIW! Programmable Hardware! ASICs! System-on-ChipSwiss FederalInstitute of Technology1 - 21Computer Engineeringand Networks Laboratory

Implementation AlternativesGeneral-purpose processorsPerformancePower EfficiencyApplication-specific instruction set processors(ASIPs) Microcontroller DSPs (digital signal processors)FlexibilityProgrammable hardware FPGA (field-programmable gate arrays)Application-specific integrated circuits (ASICs)Swiss FederalInstitute of Technology1 - 22Computer Engineeringand Networks Laboratory

General-purpose ProcessorsHigh performance! Highly optimized circuits and technology! Use of parallelism superscalar: dynamic scheduling of instructions super-pipelining: instruction pipelining, branch prediction,speculation! complex memory hierarchyNot suited for real-time applications! Execution times are highly unpredictable because ofintensive resource sharing and dynamic decisionsProperties! Good average performance for large application mix! High power consumptionSwiss FederalInstitute of Technology1 - 23Computer Engineeringand Networks Laboratory

Pentium P4Swiss FederalInstitute of Technology1 - 24Computer Engineeringand Networks Laboratory

System SpecializationThe main difference between general purpose highestvolume microprocessors and embedded systems isspecialization.Specialization should respect flexibility! application domain specific systems shall cover a class ofapplications! some flexibility is required to account for late changes,debuggingSystem analysis required! identification of application properties which can be used forspecialization! quantification of individual specialization effectsSwiss FederalInstitute of Technology1 - 25Computer Engineeringand Networks Laboratory

Example: Code-size EfficiencyCISC machines: RISC machines designed for run-time-,not for code-size-efficiency.Compression techniques: key idea(de)compressorSwiss FederalInstitute of Technology1 - 26Computer Engineeringand Networks Laboratory

Example: Multimedia-InstructionsMultimedia instructions exploit that many registers, adders etc arequite wide (32/64 bit), whereas most multimedia data types arenarrow(e.g. 8 bit per color, 16 bit per audio sample per channel)" 2-8 values can be stored per register and added. E.g.: 4 additions per instruction;carry disabled at wordboundaries.Swiss FederalInstitute of Technology1 - 27Computer Engineeringand Networks Laboratory

Example: Heterogeneous registersExample (ADSP 210x):PDAXAYAddressregistersA0, A1, A2 .MFAF ,-,.Addressgenerationunit (AGU)MYMX* ,-ARMRDifferent functionality of registers An, AX, AY, AF,MX, MY, MF, MRSwiss FederalInstitute of Technology1 - 28Computer Engineeringand Networks Laboratory

Example: Multiple memory banks or memoriesPDAXAYAddressregistersA0, A1, A2 .MFAF ,-,.Addressgenerationunit (AGU)MYMX* ,-ARMRSimplifies parallel fetchesSwiss FederalInstitute of Technology1 - 29Computer Engineeringand Networks Laboratory

Example: Address generation unitsExample (ADSP 210x): Data memory can only be fetchedwith address contained in A, but this can be done in parallel withoperation in main data path (takeseffectively 0 time). A : A 1 also takes 0 time, same for A : A M;Swiss FederalInstitute of Technology1 - 30Computer Engineeringand Networks Laboratory

Example: Modulo addressingModulo addressing:Am Am: (Am 1) mod n(implements ring or circularbuffer in memory)sliding windowxt1n mostrecentvalues.x[t1-1]x[t1]x[t1-n 1]x[t1-n 2].x[t1-1]x[t1]x[t1 1]x[t1-n 2].Memory, t t1Swiss FederalInstitute of Technologyt1 - 31Memory, t2 t1 1Computer Engineeringand Networks Laboratory

TopicsGeneral Introduction to Embedded SystemsHardware Platforms and Components! System Specialization! Application Specific Instruction Sets Micro Controller Digital Signal Processors and VLIW! Programmable Hardware! ASICs! System-on-ChipSwiss FederalInstitute of Technology1 - 32Computer Engineeringand Networks Laboratory

Control Dominated SystemsReactive systems with event driven behaviorUnderlying semantics of system description (“input modelof computation”) typically (coupled) Finite State MachinesI/OsignalsoutputsignalsoutputsignalsSwiss FederalInstitute of Technology1 - 33Computer Engineeringand Networks Laboratory

Microcontrollercontrol-dominant applications! supports process schedulingand synchronization! preemption (interrupt),context switch! short latency timeslow power consumptionperipheral units oftenintegratedsuited for real-timeapplicationsSwiss FederalInstitute of TechnologyMajor System Components8051 coreSIECO51 (Siemens)1 - 34Computer Engineeringand Networks Laboratory

TopicsGeneral Introduction to Embedded SystemsHardware Platforms and Components! System Specialization! Application Specific Instruction Sets Micro Controller Digital Signal Processors and VLIW! Programmable Hardware! ASICs! System-on-ChipSwiss FederalInstitute of Technology1 - 35Computer Engineeringand Networks Laboratory

Data Dominated SystemsStreaming oriented systems with mostly periodicbehaviorUnderlying semantics of input description e.g. flowgraphs (“input model of computation”)Bf1BBf2Bf3BB: bufferf2Application examples: signal processing, controlengineeringSwiss FederalInstitute of Technology1 - 36Computer Engineeringand Networks Laboratory

Digital Signal Processoroptimized for data-flow applicationssuited for simple control flowparallel hardware units (VLIW)specialized instruction sethigh data throughputzero-overhead loopsspecialized memorysuited for real-timeapplicationsSwiss FederalInstitute of TechnologyMajor System Components1 - 37Computer Engineeringand Networks Laboratory

MAC (multiply & accumulate)sum 0.0;for (i 0; i N; i )sum sum a[i]*b[i];zero-overhead loop(repeat next instruction N times)MAC - InstruktionLDFLDFRPTSMPYF3 ADDF30, R00, R1N*(AR0) , *(AR1) , R0R0, R1, R1TMS320C3x Assembler(Texas Instruments)Swiss FederalInstitute of Technology1 - 38Computer Engineeringand Networks Laboratory

Very Long Instruction Word s FederalInstitute of Technology1 - 39Computer Engineeringand Networks Laboratory

Example: Philips TriMedia TM100032 bits data400 MB/secSDRAMMain MemoryInterfaceCCIR601/656YUV 4:2:238 MHz (19 Mpix/sec)Video InVLDCoprocessorStereo digital audioI2S DC-100 kHzAudio InVideo OutAudio OutTimersI2C InterfaceSynchronousSerialInterface2/4/6/8 ch. digital audioI2S DC-100 kHzI2C bus tocamera, etc.32KVLIW I CPU 16KD Rolf ErnstSwiss FederalInstitute of TechnologyTM - 10001 - 40Huffman decoderSlice-at-a-timeMPEG-1 & 2CCIR60/656YUV 4:2:280 MHz (40 Mpix/sec)V.34 or ISDNFront EndImageCoprocessorDown & up scalingYUV RGB50 Mpix/secPCI InterfacePCI (32 bits, 33 MHz)Computer Engineeringand Networks Laboratory

TopicsGeneral Introduction to Embedded SystemsHardware Platforms and Components! System Specialization! Application Specific Instruction Sets Micro Controller Digital Signal Processors and VLIW! Programmable Hardware! ASICs! System-on-ChipSwiss FederalInstitute of Technology1 - 41Computer Engineeringand Networks Laboratory

FPGA – Basic StrucutreLogic UnitsI/O UnitsConnectionsSwiss FederalInstitute of Technology1 - 42Computer Engineeringand Networks Laboratory

FPGA - ClassificationGranularity of logic units:! Gate, tables, memory, functional blocks (ALU, control, datapath, processor)Communication network:! Crossbar, hierarchical mesh, treeReconfiguration:! fixed at production time, once at design time, dynamic duringrun-timeSwiss FederalInstitute of Technology1 - 43Computer Engineeringand Networks Laboratory

Floor-plan of VIRTEX II FPGAsSwiss FederalInstitute of Technology1 - 44Computer Engineeringand Networks Laboratory

VirtexLogic Cell[ and source: Xilinx Inc.: Virtex-IIPro Platform FPGAs:Functional Description, Sept.2002, //www.xilinx.com]Swiss FederalInstitute of Technology1 - 45Computer Engineeringand Networks Laboratory

Virtex II ProDevices includeup to 4 PowerPCprocessor cores[ and source: Xilinx Inc.: Virtex-II Pro PlatformFPGAs: Functional Description, Sept. 2002,//www.xilinx.com]Swiss FederalInstitute of Technology1 - 46Computer Engineeringand Networks Laboratory

TopicsGeneral Introduction to Embedded SystemsHardware Platforms and Components! System Specialization! Application Specific Instruction Sets Micro Controller Digital Signal Processors and VLIW! Programmable Hardware! ASICs! System-on-ChipSwiss FederalInstitute of Technology1 - 47Computer Engineeringand Networks Laboratory

Application Specific Circuits (ASICS)Custom-designed circuits necessary! if ultimate speed or! energy efficiency is the goal and! large numbers can be sold.Approach suffers from! long design times,! lack of flexibility(changing standards) and! high costs(e.g. Mill. mask costs).Swiss FederalInstitute of Technology1 - 48Computer Engineeringand Networks Laboratory

TopicsGeneral Introduction to Embedded SystemsHardware Platforms and Components! System Specialization! Application Specific Instruction Sets Micro Controller Digital Signal Processors and VLIW! Programmable Hardware! ASICs! System-on-ChipSwiss FederalInstitute of Technology1 - 49Computer Engineeringand Networks Laboratory

Configurable System-On-ChipSwiss FederalInstitute of Technology1 - 50Computer Engineeringand Networks Laboratory

System-on-a-Chip[NTNU]Tensilica synthesized andConfgurable microprocessor(Soft IP)Swiss FederalInstitute of Technology1 - 51Computer Engineeringand Networks Laboratory

1. Introduction to Embedded System Design 2. Software for Embedded Systems 3. Real-Time Scheduling 4. Design Space Exploration 5. Performance Analysis The slides contain material from the “Embedded System Design” Book and Lecture of Peter Marwedel and from the “Hard Real-Time Comp