Transcription
The Power MOSFET Application HandbookDesign Engineer’s GuideNexperiaManchester, United Kingdom3
The Power MOSFET Application HandbookDesign Engineer’s GuideCopyright Nexperiawww.nexperia.comISBN: 978-0-9934854-1-112NC: 9397 750 17686All rights reserved. No part of this publication may be reproduced or distributedin any form or by any means without the prior written permission of the author.Printed in the United Kingdom4
Contributors:Andrew BerryChris HillAdam BrownKelly LawBrian CliftonWayne LawsonJamie DyerKoji NishihataPhil EllisJim ParkinMark FangChristos PateropoulosKeith HeppenstallPhil Rutter5
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Understanding power MOSFET data sheet parameters1Power MOSFET single-shot and repetitive avalancheruggedness rating2Using RC Thermal models3LFPAK MOSFET thermal design – part 14LFPAK MOSFET thermal design – part 25Using power MOSFETs in parallel6Designing RC snubbers7Failure signature of electrical overstress on power MOSFETs8Power MOSFET frequently asked questions9AbbreviationsIndexLegal Information7
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Table of ContentsChapter 1: Understanding power MOSFET data sheet parametersApplication Note: 31.3.11.4IntroductionData sheet technical sectionsProduct profilePinning informationOrdering informationLimiting valuesThermal characteristicsElectrical characteristicsPackage outlineAppendicesSafe Operating Area (SOA) curvesReferences181818212121303142434350Chapter 2: Power MOSFET single-shot and repetitive avalancheruggedness ratingApplication Note: 7.12.7.22.8IntroductionSingle-shot and repetitive avalanche definitionsUnderstanding power MOSFET single-shot avalanche eventsSingle-shot UIS operationSingle-shot avalanche ruggedness ratingUnderstanding power MOSFET repetitive avalanche eventsRepetitive UIS operationTemperature componentsRepetitive avalanche ruggedness ratingConclusionExamplesSingle-shot avalanche caseRepetitive avalanche caseReferences52525353565758595960616161629
Chapter 3: Using RC Thermal ModelsApplication Note: ntroductionThermal impedanceCalculating junction temperature riseAssociation between Thermal and Electrical parametersFoster RC thermal modelsThermal simulation examplesExample 1Example 2Example 080Chapter 4: LFPAK MOSFET thermal design - part 1Application Note: 14.3.24.3.34.3.44.3.54.3.64.3.710IntroductionThe need for thermal analysisMOSFET Rth parameters and their limitationsAim of this chapterGeneral approach to thermal analysisThe use of thermal simulation softwareSimulation set-upPCB layout and stack-upA single LFPAK deviceAnalysis 1: A single-layer PCBAnalysis 2: 2-layer PCBAnalysis 3: A 4-layer PCB part 1Analysis 3: A 4-layer PCB part 2Analysis 4: A 4-layer PCB with thermal vias part 1Analysis 4: A 4-layer PCB with thermal vias part 2Summary: factors affecting the thermal performance of asingle device8282838485858686888894969899102103
34.5.44.5.54.5.64.6Two LFPAK devicesAnalysis 5: A single-layer PCBAnalysis 6: A 2-layer PCBAnalysis 7: A generalized 4-layer PCBAnalysis 8: A 4-layer PCB with thermal vias part 1Analysis 8: A 4-layer PCB with thermal vias part 2Summary: factors affecting the thermal performance of two devicesFour LFPAK devicesAnalysis 9: A single-layer PCBAnalysis 10: A 2-layer PCBAnalysis 11: A generalized 4-layer PCBAnalysis 12: A 4-layer PCB with thermal vias part 1Analysis 12: A 4-layer PCB with thermal vias part 2Summary; factors affecting the thermal performance of four 119121121Chapter 5: LFPAK MOSFET thermal design - part 2Application Note: tionThe module modelPCB characteristicsEnclosure characteristicsAxes naming conventionThe ambient environmentPotential heat pathsThe influence of y-gap on TjBlack plastic enclosure; x- and z-gaps zeroTwo more enclosure materialsSummary: the influence of y-gap on TjAdding x- and z-gaps around the PCBThe black plastic enclosureThe polished aluminium enclosureThe anodized aluminium enclosureThe three enclosures side-by-sideSummary: adding x- and z-gaps around the PCBEncapsulating the PCBPartial 3613713813914114114311
25.7.35.7.45.7.55.7.65.8Full encapsulationSummary: encapsulating the PCBDirect cooling through the enclosureBottom-side cooling of the PCBBottom-side cooling of the PCB, with encapsulationTop-side cooling of the PCBTop-side cooling of the PCB, with encapsulationSummary: direct cooling through the enclosureMounting the enclosure on a bulkheadVertical orientation of the moduleAdding the bulkheadResults for the PCB mounted centrally in the moduleResults for the PCB with bottom-side coolingResults for the PCB with top-side coolingSummary: mounting the enclosure on a bulkheadSummaryChapter 6: Using power MOSFETs in parallelApplication Note: AN115996.1Introduction6.2Static (DC) operation6.2.1 Worked examples for static operation6.3MOSFET mounting for good thermal performance andpower sharing6.4Power sharing in dynamic operation [pulse and Pulse WidthModulation (PWM) circuits]6.5Partially enhanced (linear mode) power sharing6.6Gate drive considerations6.6.1 Should individual gate drivers be used for each MOSFETin the group?6.7MOSFET packaging considerations for paralleled groups6.7.1 Bare die (KGD) MOSFETs6.7.2 LFPAK MOSFETs6.8Inductive energy dissipation in paralleled MOSFETs6.8.1 Avalanching - low side MOSFET group driving a high sideinductive 8168172173174178181183184185185185186186186
6.8.26.9Active clamping - high side MOSFET groupdriving a low side inductive loadSummary187188Chapter 7: Designing RC snubbersApplication Note: AN111607.17.27.37.47.57.67.7IntroductionTest circuitDetermining CLK and LLKDesigning the snubber - theoryDesigning the snubber - in practiceSummaryAppendix A; determining CLK from Cadd, fRING0 and fRING1190190192194196197198Chapter 8: Failure signature of electrical overstress on power MOSFETsApplication Note: 28.2.138.2.14IntroductionESD - Machine ModelESD - Human body modelUnclamped Inductive Switching (UIS) (Avalanche or Ruggedness)Linear mode operationOver-currentAppendicesMachine model EOS of BUK9508-55AMachine model EOS of BUK9Y40-55BMachine model EOS of PSMN7R0-30YLMachine model EOS of PSMN011-30YLHuman body model EOS of BUK9508-55AHuman body model EOS of BUK9Y40-55BHuman body model EOS of PSMN011-30YLUnclamped inductive switching EOS of BUK7L06-34ARCUnclamped Inductive switching EOS of BUK9Y40-55BUnclamped inductive switching EOS of PSMN7R0-30YLLinear mode EOS of BUK7L06-34ARCLinear mode EOS of BUK9Y40-55BLinear mode EOS of PSMN7R0-30YLOver-current EOS of 1821922022222322422622823013
8.2.15 Over-current EOS of PSMN7R0-30YL8.3Tables8.4Figures232233234Chapter 9: Power MOSFET frequently asked questionsApplication Note: 9.1414IntroductionGateThermal impedance (Zth) curvesMOSFET body diodeSafe operating area and linear mode operationAvalanche Ruggedness and Unclamped Inductive Switching (UIS)Capacitive dV/dt issuesPackage and mountingSPICE modelsMOSFET silicon technologySupply and availabilityEMCLeakage, breakdown and MOSFET characteristicsMOSFET 277
IntroductionDrawing on over 20 years’ of experience, the Power MOSFETApplication Handbook brings together a comprehensive set of learningand reference materials relating to the use of power MOSFETs in realworld systems. MOSFETs are used in a range of fields, from automotiveand industrial to computing, mobile and power supply, all of whichhave influenced the development of the material presented withinthis handbook.This book is aimed at engineers from any industry who have need orinterest in increasing their understanding of how to design with powerMOSFETs. The knowledge shared within this reference guide has beencollected and developed through years of working with many differentengineers from many different companies to solve real problems.Although MOSFET technology has moved on significantly in the lastdecades, many of the challenges facing designers remain the same.The goal of this book is to give insight into the sometimes confusingand complex behaviour of power MOSFETs and provide engineerswith the information necessary to solve common problems and avoidpotential pitfalls.Further product information and recently published application notescan be found at www.nexperia.com/mosfets15
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Chapter 1: Understanding powerMOSFET data sheet parametersApplication Note: AN1115817
Chapter 1: Understanding power MOSFET data sheet parametersChapter 1: Understanding powerMOSFET data sheet parameters (AN11158)(Application Note AN11158)1.1 IntroductionThis chapter explains the parameters and diagrams given in an Nexperia Power MOSFETdata sheet. The goal is to help an engineer decide what device is most suitable for a particularapplication.It is important to pay attention to the conditions for which the parameters are listed, as theycan vary between suppliers. These conditions can affect the values of the parameters makingit difficult to choose between different suppliers. Throughout this chapter, the data sheet forthe BUK7Y12-55B is used as an example. BUK7Y12-55B is an automotive-qualified part inan SOT669 (LFPAK56) package, with a voltage rating of 55 V.The layout of this data sheet is representative of the general arrangement of Nexperia powerMOSFET data sheets.Nexperia Power MOSFETs are designed with particular applications in mind. For example,switching charge is minimized where switching losses dominate, whereas on-resistance isminimized where conductive losses dominate.1.2 Data sheet technical sections1.2.1 Product profileThis section provides the overview of the device; giving the designer the key informationregarding device suitability. The general description describes the technology used; keyfeatures and example applications are listed.The quick reference data table contains more detailed information and the key parametersfor the intended application. An example of a quick reference data table is shown in Table 1“Quick reference data”.18
Chapter 1: Understanding power MOSFET data sheet parametersTable 1. Quick reference dataSymbol ParameterVDSdrain-source voltageConditionsTj 25 C; Tj 175 CooMinTypMax Unit--55VoIDdrain currentVGS 10 V; Tmb 25 C;Figure 1--61.8APtottotal powerdissipationTmb 25 oC; Table 3--105WVGS 10 V; ID 20 A;Tj 25 oC;-8.212mΩID 20 A; VDS 44 V;VGS 10 V;-14.8-nCID 61.8 A; Vsup 55 V;RGS 50 Ω; VGS 10 V;Tj(init) 25 oC: unclamped--129mJStatic characteristicsRDS(on)drain-source on-stateresistanceDynamic characteristicsQGDgate-drain chargeAvalanche ruggednessEDS(AL)Snon-repetitive drainsource avalancheenergy19
Chapter 1: Understanding power MOSFET data sheet parametersThe general format for describing a parameter is to provide the official symbol and thenthe correct parameter name. Any relevant conditions and information are listed after theparameter names. The values and units of the values are entered in the last two columns.All entries conform to IEC60747-8.The quick reference data parameters are described in more detail in the characteristics sectionof the data sheet. The following list is an introduction to some of the key issues together withtheir interpretation:VDS - the maximum voltage between drain and source that the device is guaranteed toblock in the off state. This section of the data sheet deals with the most commonly usedtemperature range, as opposed to the full temperature range of the device.ID - the maximum continuous current the device can carry with the mounting base heldcontinuously at 25 oC with the device fully on. In the example provided in Table 1, IDrequires a VGS of 10 V.Ptot - the maximum continuous power the device can dissipate with the mounting base heldcontinuously at 25 oC.RDS(on) (drain-source on state resistance) - the typical and maximum resistance of the devicein the on-state under the conditions described. RDS(on) varies greatly with both Tj and the gatesource voltage (VGS). Graphs are provided in the data sheet to assist in determining RDS(on)under various conditions.QGD (gate-drain charge) - an important switching parameter that relates to switching loss,along with QGS and QG(tot). QGD is inversely proportional to RDS(on), therefore choosing anappropriate balance between RDS(on) and QGD is critical for optimal circuit performance.QOSS (output charge) - an increasingly important switching parameter in modern MOSFETs,as the other switching parameters have been optimized.EDS(AL)S (non-repetitive drain-source avalanche energy) - describes the maximum energyallowed in any voltage spike or pulse that exceeds the VDS rating of the device. Exceedingthis rating, runs the risk of damaging the device. This parameter describes what is commonlyreferred to as “ruggedness” that is the ability of the device to withstand overvoltage events.20
Chapter 1: Understanding power MOSFET data sheet parameters1.2.2 Pinning informationThis section describes the internal connections and general layout of the device. Note that thesymbol is for an enhancement n-channel MOSFET with the source and body tied together,and a parallel diode between the source and drain. The parallel diode is known as the bodydiode and is inherent in power MOSFETs. N-channel power MOSFETs have the body diodebetween dr
4.4.4 Analysis 8: A 4-layer PCB with thermal vias part 1 108 4.4.5 Analysis 8: A 4-layer PCB with thermal vias part 2 112 4.4.6 Summary: factors affecting the thermal performance of two devices 113 4.5 Four LFPAK devices 113 4.5.1 Analysis 9: A single-layer PCB 114 4.5.2 Analysis 10: A 2-layer PCB 115 4.5.3 Analysis 11: A generalized 4-layer PCB 116 4.5.4 Analysis 12: A 4-layer PCB with .
