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Agenda Programming FPGAsWhy Are They Useful?NI FPGA HardwareCommon Applications for FPGAsHow to Learn More
FPGA TechnologyProgrammableInterconnectsLogicBlocksI/O Blocks
FPGA Logic ImplementationImplementing Logic on FPGA: F {(A B)CD} EELabVIEW FPGA CodeABCDF
Demo Filter
LabVIEW FPGA Code AbstractionCounterLabVIEW FPGAAnalog I/OI/O with DMAVHDL 4000 lines
LabVIEW FPGA ModuleFPGA LabVIEW code is translated to hardwarecircuitry implemented on the FPGA Natural representation of FPGA logic
Demo Simple I/O
Agenda Programming FPGAsWhy Are They Useful?NI FPGA HardwareCommon Applications for FPGAsHow to Learn More
Why Are They Useful? True Parallelism – Provides parallel tasks and pipelining High Reliability – Designs become a custom circuit High Determinism – Runs algorithms at deterministicrates down to 25 ns (faster in many cases) Reconfigurable – Create new and alter existing taskspecific personalities
True ParallelismEFABCDZW XY
High Reliability and DeterminismDecision Making in Software Multiple Software LayersCalculationApplication SoftwareDriver APIOperating SystemOutputsHardwareUUT 25 msResponse
High Reliability and DeterminismDecision Making in Hardware* Faster response for80 and 120 MHz clocksHighest ReliabilityApplication SoftwareOutputsDriver APICalculationHardwareUUT25 ns*ResponseOperating SystemHighestDeterminism
Demo AI, AO, Custom Threshold logic
From LabVIEW to HardwareTranslationVHDL GenerationOptimizationAnalysisLogic ReductionSynthesisPlace and RouteTiming VerificationBit StreamGenerationDownload/Run
Agenda Programming FPGAsWhat Are FPGAs and Why Are They Useful?NI FPGA HardwareCommon Applications for FPGAsHow to Learn More
What Is RIO Technology?FPGA Use NI LabVIEW to design custom hardwarecircuitry with off-the-shelf devices
NI LabVIEW FPGA Hardware TargetsR SeriesMultifunctionRIO General PurposeI/O forMeasurement andControlNI CompactRIO Industrial Controland MonitoringNISingleboardRIO Embedded SystemsNI FlexRIOOther Manufacturing Testand DesignValidation RIO IF Transceiver PCIe Framegrabbers Compact VisionSystem
Agenda Programming FPGAsWhat Are FPGAs and Why Are They Useful?NI FPGA HardwareCommon Applications for FPGAsHow to Learn More
Common Applications High-speed controlCustom DAQDigital communication protocolsSensor simulationOnboard processing and data reduction
Common Applications High-speed controlCustom DAQDigital communication protocolsSensor simulationOnboard processing and data reductionCoprocessing
High-Speed ControlAbout 200 kHz loop rate
Common Applications High-speed controlCustom DAQDigital communication protocolsSensor simulationOnboard processing and data reduction
Customize Your DAQ Device Custom timing & synchronizationMulti-rate samplingCustom triggeringCustom countersFlexible PWMFlexible encoder interface
Custom Triggered Analog Input
Common Applications High-speed controlCustom DAQDigital communication protocolsSensor simulationOnboard processing and data reduction
Digital CommunicationExample – SPI
Common Applications High-speed controlCustom DAQDigital communication protocolsSensor simulationOnboard processing and data reduction
Sensor Simulation and FPGA Fully customizable hardware – Many types of sensors Parallelism – Many sensors on chip with no interference Strict timing requirements – Deterministic or highlyrealistic Onboard processing – Engineering units to sensor signalsSensor Signals
Common Applications High-speed controlCustom DAQDigital communication protocolsSensor simulationOnboard processing and data reduction
Onboard Processing and DataReductionBuilt-In I/OProcessingOutput Analog voltages Digital communications Sensor signals Encoding/decoding Filtering/averaging Modulation/demodulation Decimation Stream processing DMA preprocessed data Streaming from input tooutput without hostinvolvementInputProcessDMA toHostOutput
Intellectual Property (IP)FFTDC/RMSWaveform AveragingDigital filteringWindowingResampling
LabVIEW FPGAIPNetni.com/ipnetMathSignal ProcessingData Manipulation and TransferRF and CommunicationsDigital ProtocolsData AcquisitionSignal GenerationControlSensor SimulationMore than 200 IP cores and examples
HDL-Based IP in LabVIEW FPGA HDL Interface Node Inline HDL integration Component-Level IP Node Parallel HDL integration
How to Learn Moreni.com/fpgaQuestions?ni.com/training2 Day LabVIEW FPGAModule Course
LabVIEW FPGA Code Abstraction Counter Analog I/O I/O with DMA LabVIEW FPGA VHDL 4000 lines. LabVIEW FPGA Module LabVIEW code is translated to hardware circuitry implemented on the FPGA Natural representation of FPGA logic FPGA. Demo Simple I/O. Agenda Programming FPGAs
