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WorkmanshipChallenges for NASAMission HardwareJeannette PlanteNASA Workmanship Standards ProgramJune 23, 2010

Overview(1) Failure to apply NASA Workmanship Standards tocontractsJ-STD-001ES AdoptionNon-Standard ProcessesThe Packaging Design Dilemma(2) Electrostatic Discharge Charge Device Model (CDM)(3) Water Soluble Flux (WSF)(4) High Density Interconnect PCB’s(5) Column Grid Area Array Interconnect(6) Pb-free

Failure to apply NASA Workmanship Standards to contractsJ-STD-001ES AdoptionNon-Standard ProcessesThe Packaging Design Dilemma

NASA Workmanship StandardsRequired for all Programs, Projects, Contracts, and Subcontracts perNPD 8730.5 NASA Quality Assurance Program PolicyNASA-STD-8739.1, Workmanship Standard for Staking and Conformal Coatingof Printed Wiring Boards and Electronic Assemblies.NASA-STD-8739.2, Workmanship Standard for Surface Mount Technology.NASA-STD-8739.3, Soldered Electrical Connections.NASA-STD-8739.4, Crimping, Interconnecting Cables, Harnesses, and Wiring.NASA-STD-8739.5, Fiber Optics Terminations, Cable Assemblies, andInstallation.ANSI/ESD S20.20, Protection of Electrical and Electronic Parts, Assemblies andEquipment (Excluding Electrically Initiated Explosive Devices).These Standards contain our best known methods for avoiding pastassembly problems and defects. These best practices may not beavailable if suppliers are used who are not compliant with them.Compliance includes having certified operators and inspectors.

Examples of Problems from lack ofRequirements Flow-downCleanliness testing of finished boards not performedDemoisturizing boards prior to soldering and conformal coating notperformedTest specimens (aka “witness sample”) not produced for staking materialCrimp pull testing not performed or alternate acceptance values usedIncorrect ESD flooring measurement methods usedRequirements for Non-Standard Processes not addressed.Finding these problems during build of mission hardware is often too late(i) contractually and (ii) in the mission life-cycle, to resolve without residualrisk.How to establish known-good suppliers for Workmanship?When/how to develop up-and-coming suppliers who seek to serve NASAniche? Without putting mission hardware/schedule at risk

Adoption of J-STD-001ESNASA Workmanship is mandated to adopt industry voluntaryconsensus standards where practicable.NASA-STD-8739.2, Workmanship Standard for Surface Mount Technology.NASA-STD-8739.3, Soldered Electrical Connections.Will be replaced by J-STD-001ES, Space Applications ElectronicHardware Addendum to J-STD-001E Requirements for Soldered Electricaland Electronic AssembliesWorkmanship best practices may not be available if suppliers are usedwho are not compliant with J-STD001xS. Compliance includes havingcertified operators and inspectors.J-STD-001 Class 3 is not an acceptable substitute!!!See http://nepp.nasa.gov/index.cfm/5553Presentation on Transition to J-STD-001DS(scroll down to the last item on the page)

Examples of Changes/Challenges with theuse of VCS’s/J-STD-001xSNASA does not “own” J-STD-001xS. NASA cannot control inclusion orexclusion of any particular requirement. Space Committee considersmilitary and commercial space requirements as well as those of NASA.Change-over will drive “sudden” need for retraining/certifying of personneloutside of the normal two-year cycle. This may be have aschedule/cost impact across the industry.NASA does not drive pace of technology insertion and may not be able toprovide technology knowledge fast enough to develop appropriateassurance requirements for low-risk missions.Though DoD “adopted” J-STD-001 Class 3 in 2001 but has not required itwidely on contracts. DoD suppliers free to adopt “cafeteria plan”compliance with requirements. NASA adoption will challenge this.

Non-Standard ProcessesNASA-STD-8739.1, para 4.1.3NASA-STD-8739.2, para 4.1.3NASA-STD-8739.3, para 4.1.3NASA-STD-8739.4, para 4.1.3NASA-STD-8739.5, para 4.1.3“Nonstandard Processes, Materials, or Parts. When thesupplier intends to use processes, materials, or parts notcovered by this standard, the supplier shall document thedetails of fabrication and inspection, including acceptanceand rejection criteria, and provide the documentation alongwith appropriate test data to the procuring NASA Center forapproval prior to use (Requirement).”

What NASAMeansWhat SuppliersProvide“ processes, materials, or parts not covered by thisstandard and provide the documentation to the procuringNASA Center for approval prior to use ”Specialty High Temp SolderPb-free SolderWater Soluble FluxBall Grid Array, Micro BGAColumn Grid ArrayStacked MemoryChip-on-BoardStaked stacked partsCustom Cryogenic Cable HarnessesNotice provided for approval duringdesign process.Declarations in advance arenot being received.Design not being done byWorkmanship personnel.Design and assembly may be doneby two different suppliers.(See: “The Packaging Design Dilemma”later in this presentation)

What NASAMeansWhat SuppliersProvide“ the supplier shall document the details of fabrication andinspection, including acceptance and rejection criteria ”Evidence of an engineered processdesigned and optimized for thetechnologyRepeatable and controlledmethods used to monitor quality.Accept/reject quality criteriaSwap new technology into oldprocessAssume old quality methods workfor new technology.Use accept/reject criteria for oldtechnology to test/inspect newtechnology.Point to NASA WorkmanshipStandards quality methods andcriteria to show acceptability ofnew technology.

What NASAMeansWhat SuppliersProvide“ and provide the documentation along with appropriate testdata to the procuring NASA Center for approval prior to use ”Evidence that the intendedconfiguration (materials, geometries,quality level) is sufficiently reliablefor the intended NASA mission.Preferably life test data. Design bounds final productperformance. Engineered process achieves designand bounds quality variations. Quality methods bound qualityescapes.Raw material qualification dataHeritage statementsSuccessful completion of NASAWorkmanship Standards tests(regardless of their applicability)Claims that it is an in-house“standard process”

The Packaging “Design” Dilemma Workmanship Standards are implemented by operatorsand inspectors on a build-to-print basis. Quality organizations in NASA and NASA’s supply chainpresume that Workmanship is “taken care of” by theoperators and inspectors. Workmanship training is notrequired for packaging designers and process engineers. NASA Workmanship Standards contain design andprocess engineering requirements which are not controlledby operators and inspectors. IPC Standards will not contain design requirements. Who will capture and own Workmanship design andprocesses requirements? Center-level documents?

Electrostatic DischargeCharge Device Model

Overview(1) ESD Models Provide a way to characterize thesensitivity of components to ESD(2) The different ESD models simulate the differentenvironments experienced by electronic componentsduring the manufacturing process.(3) Parts and assemblies may beexposed to more than one typeof ESD event over themanufacturing and test lifecycle.Courtesy ESP Seattle Inc.

HBMMMmaturematureHBM Human Body ModelMM Machine ModelCDM Charged Device ModelVoltage discharged throughRC or RCL network createsdifferent total energyexperienced by the device.CDMevolving

White Paper 2: A Case for Lowering Component Level CDM ESD Specifications andRequirements, Industry Council on ESD Target Levels, March 2009

100X2000XCourtesy of JPLScott M. Hull NASA/GSFC4600x8600xCourtesy of JPLCourtesy of JPL

HBM safety methods have brought HBM & MMfailures down to 10% of failures encounteredindustry-wide.Role of CDM in failure count is now majority ( 90%)Examples of Sources of Threats (charge ordischarge path)HBMOperator Work bench MMPick and Place Machine Automatic Test Equipment CDM Device package charging/discharging Mate/De-mate of harnesses RF Signals (including cell phone signals)

CDM Challenges- Opportunities to use on-chip ESD protection reduced inhigh speed designs- Reduction in conductor widths on-chip result in highercurrent densities and thermal stress- Package capacitances in high pin-count designs increasepeak current during CDM ESD event.- Ionizers work on an HBM time scale and are not effectivefor mitigating rapid-pulse charging eventsSuppliers have been working to a 500V qualification level forCDM (peak current @ 16A).Industry position developing to reduce qualification level to250V (peak current @ 7A). increasing baseline risk

The area needed foron-chip ESDprotection againstCDM events @ 16Ahas becomeimpractical.TypicalCDM ChallengesGate damage susceptibility is scaling withfeature size.Both are 45 nm technology, LV is Vdd 1.1V, MV is Vdd 1.8VSource: White Paper 2: A Case for Lowering Component Level CDM ESD Specifications andRequirements, Industry Council on ESD Target Levels, March 2009

CDM ChallengesHSS high speed signalRC resistor/capacitorDTSCR diode triggeredsilicon controlledrectifierCapacitance must be reduced for high speed operation.The remaining budget for ESDS circuitry scales downwardproviding lower levels of ESD protection.Source: White Paper 2: A Case for Lowering Component Level CDM ESD Specifications andRequirements, Industry Council on ESD Target Levels, March 2009

CDM ChallengesPackage size causes an increase inCDM event current. Packagecapacitance charges triboelectricallyor inductively and then dischargesrapidly into the die during the CDMevent.

CDM Devices will be less robust to CDM event in the future and“old” practices may not be sufficient. Expert help will be needed to work through CDM safetysolutions. Complex and evolving event model. CDM safety measures may include new board materials,design rules, discharge steps during test, protection fromstray RF Technology drivers in high-speed, high pin-count devicesmake them more susceptible to CDM events. Suppliers will not “ESD harden” these devices HBM methods will not protect these devices

Water Soluble Flux

WSF entering mission hardware due to increased use inthe commercial sector (“It’s our standard process.”) Increased use in the commercial sector is to avoidproblems finding and using solvents needed to clean rosinflux. Active ingredient in WSF is organic or inorganic acidhowever they are pH-neutral. Halides often added toincrease activity level. NASA Workmanship Standards cleanliness test is notapplicable to pH-neutral contaminants. Designed to findhalides. (See: “Non-standard Processes”) No known screening test for pH-neutral flux contaminants.Tests are QCI type, typically used by process engineers notoperators; requires new equipment, knowledge. (See: “ThePackaging Design Dilemma”)

WSF contamination (unreacted and uncleaned flux, uncleaned halides)has been root cause of failures in commercial production. Failures are being encounteredin commercial uses indicatingneed to understand processfactors better. Rosin flux mayhave provided more “forgiving”system (wider quality window). Cleanliness risk mitigationmethods are not well understoodand therefore not standardized(and not tuned for NASAmissions). Failure modes are electricalshorts through dendrites, metallicsalts, electrolyteCourtesy: ForesiteMetallic salt deposits may bepermanent causing entireassemblies to be scrapped.

At GSFC one project was using WSF in 2008. In 2010 thereare now five. Not being used at other NASA Centers (yet?) Five out of five users have had solder joint voiding to levelnot “normal” for a rosin process. Workmanship does not have a clear policy on acceptablelevels of voiding. Acceptability is strongly tied to thermalcycling environment. IPC points to “engineering” to refereethe acceptability of voids.

High Density InterconnectPrinted Circuit Boards