Accelerate Power Integrity Closure With RedHawk Fusion

Transcription

Accelerate Power Integrity Closure with RedHawk Fusionon the Latest Armv8-A ProcessorsArm TechCon 2019Annapoorna Krishnaswamy, Product Marketing Manager, ANSYSRahul Deokar, Product Marketing Director, SynopsysSep 2019

Agenda Advanced FinFET Trends and Challenges Benefits of RedHawk-SC Technology RedHawk Fusion - Shift Left with Power Integrity Robust optimization capabilities within ICCII/Fusion Compiler Customer Results SummarySynopsys Confidential Information 2019 Synopsys, Inc.2

Advanced FinFET Design Trends Increasing system integration Multi-core, multi-architecture devices Billions of Components on chip Analog and complex IP integration Increasing Design and Wafer Cost 7nm design costs 3X that of 16nm! Design cost 10s to 100s of millions of dollars Mask set costs couple of millions of dollarsSource: 2018 ISPD Keynote :Challenges and Opportunities in Automotive, Industrial, andIOT Physical Design, Texas Instruments New product design implementation for advanced node takes longer time But time to market window is shrinking due to rapidly evolving market requirements Design cycle time is getting squeezed Physical design cycle is overlapping IP development, SoC assembly and verification Designers need to work with dirty data and iterate more – time to results is critical !

Advanced Technology Related ChallengesFinFET Power Integrity & ReliabilityHeterogeneous Packaging (3D-IC)Power-Delivery Network OptimizationDvD impacts performanceVComplexRoutingΔV@t1ok?t1timeLRA BEC DSignalIdealΔtTruet1Chip PackageInterconnectsChip-Package noise CouplingtimeJouleHeatingThermal-Aware Electromigration(EM)Scenario #1Scenario #2WarpageMultiphysics and Multiscale Signoff are Critical for Electronics Systems

7nm Power Integrity Challenges5x500mV10xIncrease in grid complexity,compared to 16nm. Powergrids have 10B nodesUltra low voltage computing meansmargins are razor thin, and variabilityis severeNeed for increased scenariocoverage, to ensure voltageand timingSources: ANSYS, Paolo Gargini, ITRS Past, Present and Future, TSMC: Physical Design Challenges and Innovations, ISPD 2017

ANSYS SeaScapePurpose-built big data platform for EDA To address multiphysics & multiscale challenges6

Accelerating Signoff for 7nm/5nm SoCs with RedHawk-SCBenefitsTime to launchInstantDedicated machinesNoneCompute farm readinessUses unused coresAcross busy queues, multiple queues andlow memory queuesAccuracyTurn Around Time (TAT)improvement(Elastic Compute vs.Distributed Compute)3x-10xCore utilization improvement(Elastic Compute vs.Distributed Compute)5x-10xCapacityBenefit increases with increased nodecount, and/or CPU-coresCoverage

RedHawk-SC Adoption StatusMicroprocessor: top-2GPU: top-2Networking: top-4FPGA: top-2Mobile AP: 4 of top-5Automotive: top-2100% of ANSYS 7nm customers are in the process of migrating to RedHawk-SC8

SPICE vs RedHawk-SC Correlation for Advanced FinFET Process NodeDynamic IR (mV)RedHawk-SCSignal EM (A)SPICESPICESPICEStatic IR (mV)RedHawk-SCRedHawk-SCRedHawk-SC correlates very well with SPICE on Static IR, Dynamic IR and Signal EM

RedHawk FusionShift Left with Power IntegritySynopsys Confidential Information 2019 Synopsys, Inc.10

RedHawk Fusion - Shift Left with Power IntegrityEmpowering Physical Design teams with Better Productivity and PPARedHawk Fusion - In-design Block-level IR-drop OptimizationSignificant Improvement inMax IR Drop and # ViolationsIC Compiler IIFusion CompilerRedHawkFusionRedHawkSignoffAccelerated Block–level ClosureSaving Days/WeeksBetter Design PPA driven byShift-Left in IR Drop ProfileALL signoff scenarios(block/sub-system/full-chip)Synopsys Confidential Information 2019 Synopsys, Inc.11

RedHawk Fusion - In-design Block-level IR-drop OptimizationIndustry-leading Accuracy, Optimization and Advanced Node SupportAccuracyOptimizationAdvanced NodesBlock-level Signoff AccuracyRobust Optimization in P&RRedHawk-SC SupportNext-generation RedHawkbuilt on ANSYS SeaScapeup to10 xfasterElastic compute scalabilityGreater throughput / capacitySame push-button flowSynopsys Confidential Information 2019 Synopsys, Inc.12

RedHawk Fusion – Block-level Power Integrity Closure1Block Level ClosureFor PD Engineers2QoR BenefitsImproved IR DropOptimize IR Drop28%IC Compiler IIFusion CompilerRedHawkFusionIR DropRecoveredBaselineProductivity BenefitsImproved TTRAuto-TWF/IPF Generationup to15xfasterPlace CTS PGAReduce IR Violation CountParallel Runs from ICCII95%RedHawkSignoffALL signoff scenarios(block/sub-system/full-chip)3Less IRViolationsBaselinePlace PGANote: All results are written to files outside of NDM.Reduced ECO IterationsSynopsys Confidential Information 2019 Synopsys, Inc.13

ICCII / Fusion Compiler Flow With RedHawk FusionInput Data Requirements ICCII/FC Design EnvironmentStd cell– NDM design with power routingICCII/FCdesignsetup– Setup including reference libraries, SDCconstraints, activities for power analysis RedHawk Fusion Environment– IP Models.libAPLATFMemory, IPMacromodelsIC Compiler II /Fusion Compiler– Liberty files (.libs)– Cell models (APL files)Tech, EM rulespersonalizesettings– Technology files (ATF)TCL UIGUI formGUI mapsAttributesReports– GSR file (any custom settings will beincluded as a script in ICCII/FC)– Required analysis and any custom settingsRedHawk FusionVoltage drop analysisPower EM calculationResistance calculationThermal analysisSynopsys Confidential Information 2019 Synopsys, Inc.14

RedHawk Fusion within ICCII/Fusion Compiler CockpitOne-ClickAccessComprehensiveMapsSynopsys Confidential Information 2019 Synopsys, Inc.15

RedHawk Fusion Now with Block-level Signoff AccuracyKey Block-level Signoff Features2018Power Grid, Power EM, Thermal2019*APL, pStatic/Dynamic Controls, Gate-level VCDRTL VCDPwr TransientMulti-scenariovectorlessModel and Macro Modeling SupportAdvanced Technology SupportAdvanced Dynamic Controls, RTL-level VCDTCL UIOn-demand reportIn-design dB GenUser Direct Access Results, ReportsVisibility at all Hierarchical LevelsResults atall levels ofhierarchySynopsys Confidential Information 2019 Synopsys, Inc.16

RedHawk-SC FusionRelease 2019.03 includes RedHawk-SC integrationANSYS RedHawk-SCRedHawk-SC Fusion AccuracyRedHawk-SC Fusion Flowvs Standalonevs RedHawk100% Correlation (Arm Cortex-A75)No difference in the flowsJust point to correct binary:RedHawk or RedHawk-SCSame commands and appoptions across the flowsup to10 xfasterNext gen ANSYS platformSub 16nm design analysisGreater throughput/capacitySynopsys Confidential Information 2019 Synopsys, Inc.17

IR-Driven Optimization - OverviewRich feature set throughout the implementation flowIR-Driven Via InsertionIR-Driven PlacementExtraction and analysis based – DRC awareCell spreading at placement and CTS – Timing/conges awareIR-Driven ECOIR-Driven PG AugmentationWorst-case IR-dropinstanceCells with timingwindow overlap onsame railCell switching intiming window withlargest currentAdding additional metal shapes – DRC/timing/EM awareDown-sizing, load-splitting, relocation – timing awareSynopsys Confidential Information 2019 Synopsys, Inc.18

IR-Driven PlacementMethodology and FlowUsage Flows in ICC-II/FCSynopsys Confidential Information 2019 Synopsys, Inc.19

RedHawk Fusion – High-Performance Arm Cortex -A76Available in the QiK flowBaselineIR Driven PlacementWorst IR Drop 355 mV (VDDS SYS)Worst IR Drop 47 mV (VDDS CPU)90%Worst IR drop 43 mV (VDDS SYS)Worst IR Drop 2 mV (VDD CPU)Reduction in Peak IR drop value(from 355mV to 43mV)(from 47mV to 2mV)35%Synopsys Confidential InformationReduction in # IR drop violations(from 24647 to 16025) 2019 Synopsys, Inc.20

IR-Aware PG AugmentationMethodology and Flow PGA segments acts as parallel resistors– reducing the resistance of the power grid and improving the instancevoltage drop. Augmentation is designed to be DRC Neutral– Tech file driven, will honor all necessary tech-file rules. Augmentation is IR Drop Aware– Targeted fixing can focus Augmentation where required and minimizepossible negative timing impact. Timing aware.– User can manually specify critical nets and slack threshold to controlimpact on timing Multi PG support, for multi voltage designs.– PGA runs on a PG Pair, multi PG designs will need multiple PGA runs. Include/Exclude regions for PGA– PGA can be targeted to or excluded from particular areas.Synopsys Confidential Information 2019 Synopsys, Inc.21

RedHawk Fusion – High-Performance Arm Cortex -A53Deployed in FinFET Production FlowBaselineIR Driven Opt (Place CTS PGA)Experiment# DRCsWNS,nsTNS,nsMax IRDrop, mVBaselineIR-Drop Driven Opt855265-0.310-0.264-1077-6751027399%Synopsys Confidential Information28%Reduction in # IR drop violations(from 940 to 10)Reduction in Peak IR drop value(from 102mV to 73mV) 2019 Synopsys, Inc.22

RedHawk Analysis Fusion RoadmapAnalysis Root Cause IR Analysis‒ Release 2019.03 Thermal Analysis for RedHawk-SC‒ Release 2019.03-SP4 3DIC Support‒ Release 2019.12 ML Incremental IR Analysis‒ Release 2019.12 Power Switch Cell Analysis‒ Release 2020.09Performance and Capacity Hierarchical Support: AutomatedBlock Context Generation‒ Release 2019.03-SP2 Non-blocking ICC II Prompt‒ Release 2019.03-SP2 Power Switch Cell Optimization‒ Release 2020.09 Power EM Fixing‒ Release 2020.09 ML IR-driven PG synthesisOptimization IR Drop-Driven ECO Fusion‒ Release 2019.03-SP4 IR Drop-Driven CCD (Beta)‒ Release 2019.03-SP2 Multi-Scenario Based IR DropDriven Optimization‒ Release 2019.12 Multi-parameter-driven fixing forRedHawk-SC‒ Release 2020.09‒ Release 2020.09Synopsys Confidential Information 2019 Synopsys, Inc.23

RedHawk Fusion – Automotive SoC Tapeout (8/7nm)Arm Cortex-A76Shift LeftIn-design RedHawk Fusion Accelerates Block-level Power Integrity ClosureSynopsys Confidential Information 2019 Synopsys, Inc.24

RedHawk Fusion – Leading-edge GPU CustomerShift LeftBaselineIR Aware FlowBaselineIR Aware FlowIR drop violations# cells (% cells)IR drop violations# cells (% cells)95% 4.5% 8.0% 4.5% 011%)36%Synopsys Confidential InformationReduction in # IR drop violations(from 3136 to 147)Reduction in Peak IR drop value(from 106.1mV to 68.2mV) 2019 Synopsys, Inc.25

RedHawk Fusion – Mobile/Communications Design LeaderBaseline99%IR Driven PlacementReduction in # IR drop violations24%Synopsys Confidential InformationReduction in Peak IR drop value 2019 Synopsys, Inc.26

Synopsys QIKs for Advanced Arm CoresReference Flows and Guides to Meet PPA Targets using Arm Artisan IPArmCortex-A76/-A55Cortex-A76/-A55ArmArm Cortex-A73Arm Cortex -A57/-A53Arm Cortex-A7228nmArmNeoverse Neoverse N1ArmN1Arm Cortex-A75/-A55, mQIKs available to Arm-Synopsys customers, go to www.synopsys.com/ArmSynopsys Confidential Information 2019 Synopsys, Inc.27

RedHawk Fusion - SummaryAccelerate Power and Rail Integrity Closure on the Latest Armv8-A ProcessorsRedHawk Fusion - In-design Block-level IR-drop OptimizationEmpowering Physical Design teams with Better Productivity and PPASignificant Improvement inMax IR Drop and # ViolationsIC Compiler IIFusion CompilerRedHawkFusionRedHawkSignoffAccelerated Block–level ClosureSaving Days/WeeksBetter Design PPA driven byShift-Left in IR Drop ProfileALL signoff scenarios(block/sub-system/full-chip)Significant Customer Deployment, Multiple Tape-outs at Advanced 8/7nm Process NodesSynopsys Confidential Information 2019 Synopsys, Inc.28

Thank You

Power-Delivery Network Optimization DvD impacts performance Scenario #1 Scenario #2 Thermal-Aware Electromigration(EM) FinFET Power Integrity & Reliability . RedHawk Fusion -High-Performance Arm Cortex -A53 Experiment # DRCs WNS, ns TNS, ns Max IR Drop, mV Baseline 855 -0.310 -1077 102