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EC5202Device ModelingCore3-0-03 CreditsPrerequisites: NoneCourse Outcomes:At the end of the course the student will be able to:CO1Develop mathematical models for modern MOS devices.CO2Develop solution to overcome short channel issues.CO3Develop various compact models appropriate for industry.CO4Analyse current distribution in the devices like transistors, MOS devices.Mapping of COs with POsCO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 ed Syllabus: (Semiconductor Device Modelling)MOS Capacitor: Energy band diagram of Metal-Oxide-Semiconductor contacts, Mode ofOperations: Accumulation, Depletion, Midgap, and Inversion, 1D Electrostatics of MOS,Depletion Approximation, Accurate Solution of Poisson’s Equation, CV characteristics ofMOS, LFCV and HFCV, Non-idealities in MOS, oxide fixed charges, interfacial charges.The MOS transistor: Small signal modelling for low frequency and High frequency, PaoSah and Brews models; Short channel effects in MOS transistors.The bipolar transistor: Ebers-Moll model; charge control model; small-signal models forlow and high frequency and switching characteristicsCompact Modeling: Compact model Level 1, Level 2, Level 3, UTB/FD SOI MOSFET,FinFETs: I-V characteristics, device capacitances, parasitic effects of extension regions,performance of simple combinational gates and amplifiers, novel circuits using FinFETs andGAA devices.Text books/ References:1. S. M. Sze, Physics of Semiconductor Devices, (2e), Wiley Eastern, 1981.2. M. Lundstrom, Fundamentals of Nanotransistors, World Scientific Publishing Co Pte Ltd2017.3. Y. P. Tsividis, Operation and Modelling of the MOS Transistor, McGraw-Hill, 1987.4. E. Takeda, Hot-carrier Effects in MOS Trasistors, Academic Press, 1995.5. J. P. Colinge, “FinFETs and Other Multi-Gate Transistors,” Springer. 2009

EC5203Digital IC DesignCore3-0-03 CreditsPrerequisites: NoneCourse Outcomes: At the end of the course the student will be able to:CO1Design CMOS inverters with specified noise margin and propagation delay.CO2Synthesize digital circuit using Verilog HDL.CO3CO4Implement efficient techniques at circuit level for improving power and speed ofcombinational and sequential circuits.Design a processor meeting timing constraints.CO5Design memories with efficient architectures to improve access times, power consumption.Mapping of COs with PosCOPO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 2111Detailed Syllabus:MOS INVERTERS: Introduction, Definitions and Properties, Static CMOS Inverter, Staticand Dynamic Power Dissipation, CMOS inverter delay time definitions and calculations.DESIGNING COMBINATIONAL & SEQUENTIAL LOGIC GATES in CMOS: StaticCMOS Design, Dynamic CMOS Design, Power Consumption in CMOS Gates.Static Sequential Circuits, Dynamic Sequential Circuits, Non-Bistable Sequential Circuits,Logic Style for Pipelined Structures.TIMING ISSUES IN DIGITAL CIRCUITS: Introduction, Clock Skew and SequentialCircuit Performance, Clock Generation and Synchronization.DESIGNING ARITHMETIC BUILDING BLOCKS: Introduction, The Adder: Definition,Circuit and Logic Design, The Multiplier: Definition, The Shifter: Definition, PowerConsiderations in Datapath Structures.DESIGNING MEMORY: Introduction, Semiconductor Memories - An Introduction, TheMemory Core: RAM, ROM, Memory Peripheral Circuitry, Embedded DRAM.Advanced Digital IC Design: Block level designText Books:1. Jan M Rabaey, Digital Integrated Circuits, 2nd Edition, Pearson Education, 2003.2. Sung-Mo Kang, CMOS Digital Integrated Circuits, 3rd Edition, McGraw-Hill, 2003.

EC5204ANALOG IC DESIGNCore3-0-03 CreditsPrerequisites: NoneCourse Outcomes: At the end of the course the student will be able to:CO1 Understand the significance of different biasing styles and apply them aptly for different circuitsCO2 Design all basic building blocks like sources, sinks, mirrors, up to layout level.CO3 Comprehend the stability issues of the systems and should be able to design OpAmp fullyCompensated against process, supply and temperature variations.CO4 Identify the suitable different topologies of the constituent sub systems and correspondingcircuits as per the specifications of the system.CO5 Design Analog integrated system completely upto tape-out including parasitic effects.Mapping of COs with POsCOPO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 etailed Syllabus:MOS FET device I/V characteristics, second order effects, Capacitances, body bias effect,Biasing Styles, MOS small signal Model, NMOS verses PMOS devices.Basic building blocks and basic cells-Switches, active resistors, Current sources and sinks,Current mirrors: Basic current mirror, cascode current mirror, low voltage current mirror,Wilson and Widlar current mirrors, voltage and current references.Single stage amplifier: Common source stage with resistive load, diode connected load, triodeload, CS stage with source degeneration, source follower, CG stage, Gain boostingtechniques, Cascode, folded cascode, choice of device models.Differential amplifier: Quasi differential amplifier, significance of tail current source, errorsdue to mismatch, replication principle, qualitative analysis, common mode response,differential amplifier with MOS loads, single ended conversion, gilbert cellOperational amplifier-characterization, 2 stage OP amp, process and temperature independentcompensation, output stage.Band Gap Reference: General considerations, Supply independent biasing, temperatureindependent references, negative-TC voltage, positive TC voltage, Bandgap reference, PTATgeneration, constant gm biasing, speed and noise issues, case study, curvature correction.PTAT, CTAT, Bandgap circuit, start-up circuit, curvature correction Design.

Negative feedback amplifier design with Nyquist criteria analysis.Text Books:1. Pr Gray and Rg Meyer, Analysis and Design of Analog Integrated Circuits, 5thEdition, Wiley, 2009.2. Mohammed Ismail and Terri Fiez, Analog VLSI: Signal and Information Processing,McGraw-Hill, 1994.3. Geiger, Allen and Stradder, VLSI Design Techniques for Analog and Digital Circuits,Tata McGraw-Hill Education, 2010.

EC5207Nano-electronic Devices and MaterialsElective - I3-0-03 CreditsPrerequisites: Basic understanding of semiconductor devices.Course Outcomes: At the end of the course the student will be able to:CO1CO2CO3Understand the physics and materials for NanoelectronicsUnderstand the scaling issues and need for non-classical devicesAnalyse the performance of novel devicesMapping of COs with POsCO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12121CO11CO2131CO3 1Detailed Syllabus:Overview: Nano devices, Nano materials, Nano device characterization, Definition ofTechnology node, MOS capacitor, MOS Scaling theory, Moore’s Law and Koomey's law.Issues in scaling MOS transistors: Short channel effects, Description of a typical 65 nmCMOS technology, Role of interface quality and related process techniques, Gate oxidethickness, scaling trend, SiO2 vs High-k gate dielectrics, Integration issues of high-k,Interface states, bulk charge, band offset, stability, reliability - Qbd high field, possiblecandidates, CV and IV techniques, Transport in Nano MOSFET, velocity saturation, ballistictransport, injection velocity, velocity overshoot, Metal gate transistor : Motivation,requirements, Integration Issues.Non classical MOS transistor: Requirements, and Novel devicesSOI - PDSOI and FDSOI, Ultrathin body SOI - double gate transistors, integration issues.Vertical transistors - FinFET and Cylindrical gate FET.Novel devices: Tunnel FET, Negative-Capacitance (NC) FET.Metal source/drain junctions - Properties of schotky junctions on Silicon, Germanium andcompound semiconductors -Workfunction pinning.Germanium Nano MOSFETs : strain , quantization , Advantages of Germanium overSilicon, PMOS versus NMOS.Compound semiconductors - Compound semiconductors MOSFETs in the context ofchannel quantization and strain, Hetero structure MOSFETs, exploiting novel materials,strain, quantization.Emerging nano materials :structures.CNT, Graphene, Nanotubes, nanorods and other nano-Text Books:1. Y. Taur and T. Ning, “Fundamentals of Modern VLSI devices” Cambridge UniversityPress4. Nicollian and J. R. Brews “MOS (Metal Oxide Semiconductor) Physics and Technology”Wiley Publishers

5. Brundle, C.Richard; Evans, Charles A. Jr.; Wilson, Shaun “Encyclopedia of MaterialsCharacterization”, Elsevier.6. Supriyo Datta, Lessons from Nanoelectronics A new Prospective on transport – Part A:Basic Concepts, World Scientific, 2017.7. J. P. Colinge, “FinFETs and Other Multi-Gate Transistors,” Springer. 2009tsividis8. Related research papers.

EC5208MEMS & NEMSElective - I3-0-03 CreditsPrerequisites: Basics of VLSI TechnologyCourse Outcomes: At the end of the course the student will be able to:CO1CO2CO3Understand the micro-fabrication principles.Design a MEMS capacitive switch.Apply MEMS concepts for sensor and optical device design.Mapping of COs with POsCOCO1PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO121CO2CO31211111231211111Detailed Syllabus:Introduction to Micro-fabrication: Cleaning, Oxidation, Diffusion, Mask making,Lithography, Etching, Ion Implantation, CVD, PVD, Metallization; Surface micromachiningand Bulk Micromachining, DRIE, LIGA, Fabrication of high aspect ratio deformablestructuresElasticity in Materials: Stress, strain calculations, Normal and Shear strains and constitutiverelations, Plane stress, biaxial stress, residual stress, energy relations, Load-deflectioncalculations in beams, cantilevers (rectangular cross section), Elastic deformation in squareplate, Resonant frequency calculations: Rayleigh-Ritz methodMEMS Capacitive Switch: Lumped model, pull-in voltage, Electromechanical deflectionmodeling, pull-in instability, switching time and pull-in voltage scaling, Physical effects innanoscale gap-size, squeeze-film damping , perforated MEMS Capacitive switch, Combactuators, Accelerometer, Pressure sensor, Energy approach: Lagrangian Mechanicsapplicable to MEMS capacitive switches, Reliability in RF-capacitive switchMEMS Sensors: Thermal sensor, Interaction of Thermal-Electrical Fields, Numerical designof thermal sensors, Bio-MEMS design problemsOptical MEMS: 2-D, 3-D switches, design examples.Text Books:1. Rebeiz, G.M., RF MEMS: Theory Design and Technology,Wiley 19992. Stephen D. Senturia, Microsystem Design, Kluwer Academic 20013. Madou, M., Fundamentals of Microfabrication, CRC Press 19974. Sandana A., Engineering biosensors: kinetics and design applications, Academic Press20025. Related research papers

EC5209Fundamentals of NanoelectronicsElective - I3-0-03 CreditsPrerequisites: NoneCourse Outcomes: At the end of the course the student will be able to:CO1CO2CO3CO4Understand the concept of electrical and thermal conductivity in metalUnderstand the crystal structure and bravais lattice typesStudy the concept of energy band gaps and Tight Binding ModelAnalyse the Ferromagnetism in solidsMapping of COs with POsCO PO1 PO2 PO3 PO4 PO5 PO61CO11CO21CO3 121CO41CO5PO7 PO8 PO9 PO10 PO11 PO1221311Detailed Syllabus:Drude's model: Introduction to Drude's theory of electrons in a metal, Postulates of Drude'stheory, Calculating electrical conductivity of metal using Drude's Model, Hall effect inmetals, Understanding thermal conductivity of a metal using Drude's modelSommerfeld's model: Fermi energy and Fermi Sphere, Density of states; Specific heat of anelectron gas and the behaviour of thermal conductivity of a solid and relationship withelectrical conductivity; Introduction to magnetism in metalCrystal structure and their classifications: Understanding crystal structure using BravaisLattice, Bravais lattice types, different crystal types, indexing crystal planesVibrations of crystals with monoatomic basis, Acoustic and optical modes; Two atoms ates,per primitive basis, Quantization of Elastic waves, Density of states of phonons, PhononMomentumBloch's theorem for wavefunction of a particle in a periodic potential, Nearly free electronmodel, origin of energy band gaps; Kronig-penney Model, Tight Binding ModelMagnetism in materials; Superconductivity.Text Books:1. John Singleton, Band Theory and Electronic Properties of Solids, Oxford, 2001.2. Prasanta K. Misra, Physics of Condensed Matter, Elsevier, 2012.3. M. L. Cohen and S. G. Louie, Fundamentals of Condensed Matter Physics, Cambridgeuniversity Press, 2016.4. Supriyo Datta, Lessons from Nanoelectronics A new Prospective on transport – Part A:Basic Concepts, World Scientific, 2017.

EC5210Low Power VLSI DesignElective - II3-0-03 CreditsPrerequisites: NoneCourse Outcomes: At the end of the course the student will be able to:CO1CO2CO3CO4CO5Identify clearly the sources of power consumption in a given VLSI Circuit.Analyze and estimate dynamic and leakage power components in a DSM VLSI Circuit.Choose the types of SRAMs/ DRAMs for the given Low power applications.Design low power arithmetic circuits and systems.Decide at which level of abstraction is advantageous to implement low powertechniques in a VLSI system design.Mapping of COs with POsCOPO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12CO11111CO21112223CO3CO43CO5111Topics Covered:Introduction, Sources of Power Dissipation, Static Power Dissipation, Active PowerDissipation.Designing for Low Power, Circuit Techniques for Leakage Power Reduction.Standard Adder Cells, CMOS Adders Architectures, Low Voltage Low Power DesignTechniques, Current Mode Adders.Types of Multiplier Architectures, Braun, Booth and Wallace Tree Multipliers and theirperformancecomparison.Sources of power dissipation in SRAMs, Low power SRAM circuit techniques, Sources ofpower dissipation in DRAMs, Low power DRAM circuit techniques, Embedded DRAM.The increased delays of wires, New materials for wires and dielectrics, Design methodstaking into account interconnection delays, Cross talk.Basic background on testing, Unsuitable design techniques for safety-critical applications,Low power and safely operating circuits, Case study – A Low power subsystem designText Books:1. Kiat Seng Yeo and Kaushik Roy, Low- Voltage, Low-Power VLSI Subsystems, Edition2009, Tata Mc Graw Hill

2. Soudris D, Piguet C and Goutis C, Designing CMOS Circuits for Low Power, KluwerAcademic Publishers, 2002Reference Book:1. Jan Rabaey, Low Power Design Essentials, Springer.

EC5211VLSI ARCHITECTURESElective II3-0-03 CreditsPrerequisites: NoneCourse Outcomes: At the end of the course the student will be able to:CO1CO2CO3CO4Design of RISC architecture and controller for a specific instruction set.Improve the performance of RISC processor by employing pipelining.Translate DSP algorithm into an efficient architecture and study the design ofdifferent building blocks of DSP architectures.Estimate the effect of folding, unfolding and retiming techniques on theperformance of DSP architectures.Mapping of COs with PosCOPO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12CO1221121CO2221331CO32122CO431221112Topics Covered:Essential features of Instruction set architectures of CISC, RISC and DSP processors andtheir implications for Implementation as VLSI Chips, CPU performance and its factors,evaluating performance.Design of RISC processor, Enhancing performance with pipelining: An overview ofpipelining, pipelined implementation of RISC instruction set, various hazards of pipelining,Hazard free pipelined RISC implementationArchitectures for programmable digital signal processing devices: representation of DSPalgorithms, basic architectural features, DSP computational building blocks, bus architectureand memory, data addressing capabilities, address generation unit, programmability andprogram execution, speed issues, features for external interfacing.Iterative bound: Introduction, data flow graph representations, loop bound and iterativebound, algorithms for computing iteration bound, iteration bound of multi rate data flowgraphs.Pipe lining and parallel processing: Introduction, pipelining of FIR digital filters, parallelprocessing, pipelining and parallel processing for low powerRetiming: Introduction, definitions and properties, retiming techniques.Unfolding: Introduction, an algorithm for unfolding, properties of unfolding, critical path,unfolding, and retiming. Applications of unfolding.Folding: Introduction, folding transformation, register minimization techniques.

Text Books:1. D.A, Patterson And J.L. Hennessy, Computer Organization and Design: Hardware /Software Interface, 4th Edition, Elsevier, 2011.2. Keshab Parhi, VLSI digital signal processing systems design and implementations,Wiley 19993. Avatar sigh, Srinivasan S, Digital signal processing implementations using DSPmicroprocessors with examples, Thomson 4th reprint, 2004.

EC5212Hardware Description LanguagesElective III3-0-03 CreditsPrerequisites: NoneCourse Outcomes: At the end of the course the student will be able to:CO1CO2CO3CO4CO5Differentiate sequential language and concurrent language.Design combinational logic circuits using VHDL.Design sequential logic circuits using VHDL.Model Analog circuits using Verilog AMS.Differentiate sequential language and concurrent language.Mapping of COs with PosCOPO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12CO1221211CO211113CO311112CO4222111Detailed Syllabus:Verilog: About Verilog, Design Flows & EDA Tools, Code Structure, Data types, Operatorsand Attributes: Operators, Attributes, User-Defined Attributes, Operator, overloading.Concurrent Code: Concurrent versus Sequential, Using Operators, WHEN, Generate andBlock, Sequential Code: Process, Signals and Variables, IF, WAIT, CASE, Using Sequential,Code To Design Combinational Circuits.State Machines: Introduction, Design Style #1, Design Style #2 (Stored Output), EncodingStyle: From Binary to OneHot.System Verilog: Verilog , Coverage, Randomization, Assertion, functional coverage,Object oriented programming, define – parameter.Verilog-AMS: Verilog Family of Languages, Mixed Signal Simulators, Applications ofVerilog-AMS, Analog Modeling.Language Reference: Basics, Data Types, Signals, Expressions, Analog Behavior.Text Books:1. Samir Palnitkar, Verilog HDL, 2nd Edition, Pearson Education, 2003.2. Chris Spear, SystemVerilog for Verification: A Guide to Learning the Testbench LanguageFeatures, 3rd ed., Springer, 20123. Kenneth S Kundert, Olaf Zinke, Designers Guide to Verilog AMS, Springer, 2004.

EC5205ANALOG IC DESIGN LABCore0-0-42 CreditsPrerequisites: Analog IC DesignCourse Outcomes: At the end of the course the student will be able to:CO1 Understand the significance of different biasing styles and apply them aptly for differentAnalog circuits.CO2 Design all basic building blocks viz., sources, sinks, mirrors, up to layout level.CO3 Comprehend the stability issues of the systems and design OPamp fully compensatedagainst process, supply and temperature variations.CO4 S

Program Outcomes PO1 Identify, characterize, model and offer solutions to issues related to IC design PO2 Understand the advances in the VLSI technologies PO3 Identify design requirements of analog and mixed signal circuits PO4 Design low power digital integrated circuits PO5 Develop efficient architectures for improving system performance in terms of speed,