WIXLIB

William StallingsComputer Organizationand Architecture8th EditionChapter 1Introduction

Architecture & Organization 1 Architecture is those attributes visible tothe programmer—Instruction set, number of bits used for datarepresentation, I/O mechanisms, addressingtechniques.—e.g. Is there a multiply instruction? Organization is how features areimplemented—Control signals, interfaces, memorytechnology.—e.g. Is there a hardware multiply unit or is itdone by repeated addition?

Architecture & Organization 2 All Intel x86 family share the same basicarchitecture The IBM System/370 family share thesame basic architecture This gives code compatibility . at leastbackwards Organization differs within members ofthe same family, e.g. floating point numerical co-processors with names like 8087, 80287 and 80387. Withvery few exceptions, the 80486 and subsequent x86processors then integrated this x87 functionality on chip.

Structure & Function Structure is the way in which componentsrelate to each other Function is the operation of individualcomponents as part of the structure

FunctionGeneral computerfunctions:—Data processing—Data storage—Data movement—Control

Operations (a) Data movementI/O (peripherals directly attached)Communications/Networking(communication lines)Example application?

Operations (a) Data movementI/O (peripherals directly attached)Communications/Networking(communication lines)Camera attached to a PC,sending the frames to awindow on the screen of thesame PC.

Operations (b) StorageExample application?

Operations (b) StoragePlaying an mp3 filestored in memoryto earphones attachedto the same PC.

Operation (c) Processing from/to storageExample application?

Operation (c) Processing from/to storageAny number-crunchingapplication that takesdata from memory andstores the result back inmemory.

Operation (d)Processing from storage to I/OExample application?

Operation (d)Processing from storage to I/OReceiving packets over anetwork interface, verifyingtheir CRC, then storing themin memory.

Structure - Top inesMainMemory

Structure - The CPUCPUComputerArithmeticandLogin UnitRegistersI/OSystemBusMemoryCPUInternal CPUInterconnectionControlUnit

Structure - The Control UnitControl olUnitControl UnitRegisters andDecodersControlMemory

William StallingsComputer Organizationand Architecture8th EditionChapter 2Computer Evolution andPerformance

ENIAC - background Electronic Numerical Integrator AndComputer Eckert and Mauchly University of Pennsylvania Trajectory tables for weapons Started 1943 Finished 1946—Too late for war effort Used until 1955

ENIAC - details Decimal (not binary)20 accumulators of 10 digitsProgrammed manually by switches18,000 vacuum tubes30 tons15,000 square feet140 kW power consumption5,000 additions per second

von Neumann/Turing Stored Program conceptMain memory storing programs and dataALU operating on binary dataControl unit interpreting instructions frommemory and executing Input and output equipment operated bycontrol unit Princeton Institute for Advanced Studies(IAS) computer Completed 1952

Structure of von Neumann machine

To do in NOTEBOOK for next timeSection 1.3 Know the definitions of all Key Terms Answer all review questionsSection 2.1 Be able to draw the IAS/von Neumanndiagram – fig. 2.1

IAS - details1000 x 40 bit words, each word representing—One 40-bit binary number—Two 20-bit instructions:– 8 bits opcode– 12 bits addressSet of registers (storage in CPU)— Memory Buffer Register— Memory Address Register— Instruction Register— Instruction Buffer Register— Program Counter— Accumulator— Multiplier Quotient

John von Neumann and the IAS machine, 1952

IAS organizationMemory Buffer Registereither sends data to or receivesdata from Mem. or I/OMemory Address Registerspecifies which Mem. locationwill be read or written nextControl signals are set bythe opcode part of theinstruction bits.Examples: Bring a new instructionfrom Mem. (fetch) Perform an addition(execute)

IAS organizationWhy do we need botha register and a bufferregister to holdinstructions?Why does the arrowbetween PC andMAR point bothways?

IAS organizationHint: 2 instructionsare stored in eachmemory wordHint: the next instructioncan be found eithersequentially, or through abranch (jump)

IAS – the FETCH-EXECUTE cycleEach instruction is executed in the same twostep manner: FETCHload the binary code of the instr.from Memory (or IBR)—Opcode goes into IR—Address goes into MAR EXECUTEsend appropriate controlsignals to do what the instr. needs to do

IAS FETCHEXECUTE cycle

IAS – instruction set (architecture!)Specifies one of 21 instructionsThere was no assembly language back then!

IAS – instruction set (continued)

Programming the IAS Write a program to add two numbersstored in memory at addresses 0 and 1 andstore the result in memory at address 2 To do in notebook for next time:—Write a program that compares the numbersstored in memory at addresses 0 and 1 andplaces the larger one at address 2

IAS extra-credit question (due next class)Why are there 12 bits for the memoryaddress?

Commercial Computers 1947 - Eckert-Mauchly ComputerCorporation UNIVAC I (Universal Automatic Computer) US Bureau of Census 1950 calculations Became part of Sperry-Rand Corporation Late 1950s - UNIVAC II—Faster—More memory

IBM Punched-card processing equipment 1953 - the 701—IBM’s first stored program computer—Scientific calculations 1955 - the 702—Business applications Lead to 700/7000 series

Second generation of computersTransistors Replaced vacuum tubesSmallerCheaperLess heat dissipationSolid State deviceMade from Silicon (Sand)Invented 1947 at Bell Labs by WilliamShockley et al.

Transistor Based Computers NCR & RCA produced small transistormachines IBM 7000 DEC (Digital Equipment Corporation) wasfounded in 957—Produced PDP-1 in the same year

Third generation of computers:Integrated Circuits A computer is made up of gates, memorycells and interconnections All these can be manufactured eitherseparately (discrete components) or on the same piece of semiconductor(a.k.a. silicon wafer)

Generations of Computers Vacuum tube - 1946-1957 Transistor - 1958-1964 Small scale integration - 1965 on—Up to 100 devices on a chip Medium scale integration - to 1971—100-3,000 devices on a chip Large scale integration - 1971-1977—3,000 - 100,000 devices on a chip Very large scale integration - 1978 -1991—100,000 - 100,000,000 devices on a chip Ultra large scale integration – 1991 —Over 100,000,000 devices on a chip

Moore’s Law Increased density of components on chip Gordon Moore – co-founder of Intel Number of transistors on a chip will double everyyear Since 1970’s development has slowed a little— Number of transistors doubles every 18 months Cost of a chip has remained almost unchanged Higher packing density means shorter electricalpaths, giving higher performance Smaller size gives increased flexibility Reduced power and cooling requirements Fewer interconnections increases reliability

Growth in CPU Transistor Count

IBM 360 series 1964 Replaced (& not compatible with) 7000series First planned ―family‖ of computers—Similar or identical—Similar or identical—Increasing speed—Increasing numberterminals)—Increased memory—Increased costinstruction setsO/Sof I/O ports (i.e. moresize Multiplexed switch structure

DEC PDP-8 1964First minicomputer (after miniskirt!)Did not need air conditioned roomSmall enough to sit on a lab bench 16,000— 100k for IBM 360 Embedded applications & OEM BUS STRUCTURE

DEC - PDP-8 Bus Structure

Semiconductor Memory 1970 Fairchild Size of a single core—i.e. 1 bit of magnetic core storage Holds 256 bitsNon-destructive readMuch faster than coreCapacity approximately doubles each year

To do for next time Read from text for next time: Ch. 2 untilMicroprocessors (p.36) Take notes in notebook!

1-minute Quiz What is a word in a computer? (p.20) Do you think the word size pertains tocomputer architecture or to computerorganization? Explain!

1-minute Quiz The computer industry’s first plannedfamily of computers was:—The—The—The—TheSperry-Rand UNIVACIBM System/360DEC PDPIBM System/7000

1-minute Quiz What was each of these computer’s claimto fame?—The—The—The—TheSperry-Rand UNIVAC IIBM System/360DEC PDP-8IBM 701

1-minute Quiz The text states that the latestsemiconductor memories store 16 Giga-bitson a single chip (it’s the binary Giga, 230) Assume that the word size is one Byte How many address lines are needed?

Programming the IASWrite a program that compares the numbersstored in memory at addresses 0 and 1 andplaces the larger one at address 2

Programming the IASWrite a program that compares the numbers storedin memory at addresses 0 and 1 and places thelarger one at address 2 Remember: In a von Neumann architecture, bothdata and program are in the same memory! Let’s start storing the program at address 42(decimal) Data segment and code segment – draw thememory map!

Microprocessors - Intel 1971 - 4004—First microprocessor—All CPU components on a single chip—4 bit—Multiplication by repeated addition, nohardware multiplier! Followed in 1972 by 8008—8 bit—Both designed for specific applications 1974 - 8080—Intel’s first general purpose microprocessor

1970s ProcessorsIntroducedClock speedsBus widthNumber oftransistorsFeature 1972197419781979108 kHz108 kHz2 MHz4 bits8 bits8 bits16 bits8 bits2,3003,5006,00029,00029,00063664 KB1 MB1 MB10640Bytes16 KB5 MHz, 8 MHz,10 MHz5 MHz, 8 MHz

1980s ProcessorsIntroduced80286386TM DX386TM SX486TM DX CPU198219851988198916 MHz - 33 MHz25 MHz - 50 MHz6 MHz Clock speeds12.5MHzBus widthNumber oftransistorsFeature size (µm)AddressablememoryVirtual memoryCache16 MHz - 33MHz16 bits32 bits16 bits32 bits134,000275,000275,0001.2 million1.5110.8 - 116 MB4 GB16 MB4 GB1 GB64 TB64 TB64 TB———8 kBSee more tables in the text, p.39!

2.2 Designing for performance Today’s computer basic building blocksare still the ones of the IAS!. But many ―tricks‖ have been invented toimprove performance

Some of the main “tricks” PipeliningOn board cacheOn board L1 & L2 cacheBranch predictionData flow analysisSpeculative execution

Performance Balance Processor speed increased Memory capacity increased Memory speed lags behind processorspeed—See Fig. 2.10 on next slide

Logic and Memory Performance Gap

Solutions Increase number of bits retrieved at onetime—Make DRAM ―wider‖ rather than ―deeper‖ Change DRAM interface—Cache Reduce frequency of memory access—More complex cache and cache on chip Increase interconnection bandwidth—High speed buses—Hierarchy of buses

I/O Devices Peripherals with intensive I/O demands—E.g. Computer clusters Large data throughput demandsProcessors can handle thisProblem moving d interconnection buses—More elaborate bus structures– E.g. InfiniBand—Multiple-processor configurations

Typical I/O Device Data Rates

Key is Balance among: Processor componentsMain memoryI/O devicesInterconnection structures

To do for next time Read from text sections—2.3 – Evolution of Intel x86—2.4 – Embedded systems and the ARM Take notes in notebook!

Embedded Systems - ARM ARM evolved from RISC design Early 1980s: Acorn Computers (ARM Acorn RISC Machine) Although initially intended for a generaluse microcomputer, today it’s used mainlyin embedded systems—Used within a larger product—Not a general-purpose computer—Dedicated function—E.g. Anti-lock brakes in car

Embedded Systems Requirements Different sizes—Different constraints, optimization, reuse Different requirements—Safety, reliability, real-time, flexibility,legislation—Lifespan—Environmental conditions—Static v dynamic loads—Slow to fast speeds—Computation-intensive vs. I/O-intensive—Discrete-event vs. continuous dynamics

Possible Organization of an Embedded System