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Industrial Solutions2017 JuneCOVER PAGE SUBTITLE PLACEHOLDERCOMPANY CONFIDENTIAL

Agenda20 minutes20 minutes20 minutesTSN and LS1028ARoboticsOpen Industrial Linux and demo

Industry 4.0 Requires Scalable Application ProcessingAnalyzeMonitorAutomateImproving time to market, manufacturing flexibility, and increasing quality and efficiency will requiresmarter, connected businessesPowering Industrial Applicationsfor over 6 decadesLegacyLongevity1 Billion Industrial ApplicationProcessors ShippedExtreme OpComplete Solutions for Industrial ProcessingSecurity

Example Industrial outerIndustrialFirewallRemoteTerminal Unit(RTU) PLCs)Robots(Controllers/PLCs)

Industrial Protocols for Different ApplicationsProtocolsTarget Applications Motor drivesMotion controlSynchronized servos Conveyor beltsPicker armsPLCs, I/O ControlValves SensorsData scannerInventorymanagementIRTDeterministic 1 µs jitter 1Deterministicms cycle time 1 ms Cycle TimeIRTRTDeterministicJitter1to 100mattersms Cyclefor syncTime1 to 100 ms cycle timeNRTNRTNon-deterministicNon-deterministic 100doesn’tms CycleTimeJittermatter 100 ms cycle timeIEEE 1588 Precision Time ProtocolVERY jitter sensitive; cycle time does not matter

Strong Legacy in Industrial Embedded Systems Embedded and Automotive Heritage JEDEC Industrial and Consumer Certification Founder of Multicore for Avionics (MCFA) working group Secure, Trustworthy, Assured and Resilient Semiconductors and Systems(STARSS) NXP membership in European Horizon 2020 Cert MILS project Automotive AEC-Q100 Certification U.S. National Institute of Standards and Technology (NIST) Cryptographic AlgorithmValidation Program (CAVP) IEEE Audio Video Bridging (AVB) Task Group IEEE 1588 Time Sensitive Network (TSN) EtherCAT Technology Group (ETG) PROFI International (PI) Wireless Hart Zigbee

Supply LongevityIndustrial applications require productlongevity Long product lifecycles Special product certification requiredNXP Industrial Application Processors 10 and 15 year supply longevity options Formal program with products listed atwww.nxp.com/productlongevity

Extreme Operating Conditions 10 year product life with continuous operation Product Life Application Notes Extreme temperature conditions -40o C cold start 70-85o C ambient operating conditions Up to 125o C junction temperature Low power consumption for fanless designs Small footprint for space-constrained designs

QorIQ Layerscape – Leading the 64-bit ARM and Multicore InnovationSDN, NFV,Cloud Networking,StorageFactory Automation, HMI,IoT GatewaysLX20xxIndustrial Firewall,Managed Switches, Gateways,Access PointsRemote Terminal, PLC, Lowpower NodesLS1012ACortex -A532Gbps Packet1Gbps CryptoLowest power64-bit ARM Cortex-A72 cores2Gbps Pkt1Gbps -A92 cores2Gbps Pkt2Gbps CryptoLS1028ALA1575Cortex-v82-4 cores10 Gbps PktCortex-v82 coresGPU LCDControllerWireless4 port TSN EthernetSwitchTSN and GPU forIndustrial IoTLS1043ACortex-A532-4 cores10Gbps Pkt5Gbps Crypto1st 64-bit ARM processor forgateways and accesspointsCortex-A722 - 4 cores10Gbps Pkt10Gbps Crypto1st Value Tier A72ARM for gatewaysand routersCortex-A534-8 cores20Gbps Pkt10Gbps CryptoCortex-A724-8 cores40G Pkt20G CryptoCortex-A728-24 cores100Gbps Pkt100Gbps Crypto40W1st 16 nm product1st 8x A72 ARM Nextgen programmableoffload1st 8x A53 ARM Next genprogrammable offload

TSN AND LS1028A

Time Sensitive Networking (TSN):Extend use cases from audio/video applications (AVB) to control systemsReduced worst-case delays 4 μs or less per hop @ 1 Gbps for short messages (plus cable delays)Improved robustness: Alternative paths with “instant” switchover Multiple clock sources with “instant” switchoverScalability Reduced management traffic for reservations and configurationConverged Networks

Major Markets For TSNAutomotive Low, BoundedLatency ReservedBandwidth GrowingBandwidthIndustrial Pro A/VVery Low Latency Time SyncTime Sync Bounded LatencyHigh Bandwidth Ease ofRedundancyDeploymentNetworkConvergenceConsumer Interoperability Flexibility for newmedia

Time Sensitive Networking Feature PlanStandardDescription802.1QbvTime-aware shaping (queue based)802.1QbuFrame pre-emption802.1CBRedundancy (frame replication and elimination)802.1QccEnhancements and improvements for stream reservation802.1QchCyclic queuing and forwarding802.1QciPer-stream filtering and policing802.1ASTiming and synchronization (mechanisms for faster fail-over of clock grandmasters)

802.1Qbv: TAS – Time Aware ShapingTime Triggered transmissions from each of 8 queuesQueue selection based on priority field of VLAN tagLocal Time10:04:51Reserves bandwidth for deterministic trafficthroughout the networkTAS Cut-through guarantees 2 usec latencythrough switches and daisy chain endpoints

802.1Qbu: Frame Pre-emption1. Allows priority packet to interrupt best effort traffic in the middle of a frame2. Once priority packet is finished, best effort traffic continues from the same spotLocal Time10:04:51Local Time10:04:52Queue 1SwitchingfabricQueue 2Reclaims window, starts TxOwns window, nothing to TxBorrowing window, begin TxQueue 3Queue 1SwitchingfabricQueue 2Preempted, stops transmit mid frameQueue 3Can be used with Time Aware Shaping to increase bandwidth for best effort traffic, allow for large packetsizesCan also be used alone, with 2 traffic classes

802.1ASrev: Timing and synchronization Defines how TSN ports & switches synchronize their clocks with other network clocks, so that sender andreceiver have a shared understanding of time. 802.1AS eventually becomes a profile of IEEE 1588.Standardizes the use of multiple grandmaster clocks as well as the possibility to make multiple connections tothese grandmaster clocks for redundancy/fail-over.Defines support for multiple clocks (local 1, local 2, local 3; synchronized to different masters for differentpurposes)Global TimeMaster 110:04:51Global TimeMaster 210:04:51Local Time10:04:51Queue 1SwitchingfabricQueue 2Queue 3

802.1CB: Redundancy (frame replication and elimination)Global TimeMaster 210:04:51Global TimeMaster 110:04:51Local Time10:04:51Queue 1Port 1 From a management perspective, defines how to configure redundant transmissions of frames (presumably fromdifferent ports on a switch) to ensure that the target receives at least one copy, even if one transmission path isdisrupted. Similar to HSR and PRP.Works with 802.1CA: Path Control & Reservation.Handles duplicate frames (1 from each path)Queue 2Queue 3SwitchingfabricQueue 1Port 2 Queue 2Queue 3

802.1Qcc: Enhancements and improvements for stream reservationAn improved version of 802.1Qat Stream Reservation Protocol)Support for more streams, configurable SR (Stream Reservation) classes and streams, better description ofstream characteristics, support for Layer 3 streaming, deterministic stream reservation convergence, and UNI(User Network Interface) for routing and reservations. TSN configuration can be achieved statically by a networkdesigner, or dynamically by a network service.Global TimeMaster 210:04:51Global TimeMaster 110:04:51Switch 2Local Time10:04:51SwitchingfabricPort 1Queue 1Queue 2Queue 3Switch 3Queue 1Queue 2Queue 3Port 1 Switchingfabric

802.1Qci: Per-stream filtering and policingPer-stream filtering and policing perform per-stream bandwidth enforcement to ensure conformance with traffic contract detect and limit faulty stream to protect transmission of other non-faulty streams on egress filter out non-conformant frames, e.g. over-sized framesPer-class filtering and policing perform per-class bandwidth enforcement for control-data classes on egress portDiagram and text from presentation:Stream Filtering and Policing for Industrial Control ApplicationsIEEE 802 Plenary Meeting - March 2015, BerlinFeng Chen, Franz-Josef GoetzSiemens AG

NXP and TSN SJA1105T AutomotiveTSN Ethernet switchannounced August,2015 Production today TSN, AVB, DeterministicEthernet

TSN Demo Overview 3 host Linux machines connected through a switch2 TCP flows competing for bandwidthFlows bottlenecked because they are sharing the same link towards Host 2Combined throughput cannot exceed 1000Mbps3 approaches to isolate the flows’ impact on each other: Standard switch configuration: do nothing Ingress Policing: rate-limit traffic coming from Host 3 Time Gating: schedule the 2 flows on different time slots

TSN Demo – Analysis: Scheduling configuration The Time-Aware Scheduler works by following theguidelines in 802.1Qbv The 5 Egress Ports each have 8 Gates, whichcan be open or closed Each Gate has 1 Queue associated with it Whenever a Gate is open, packets from thatQueue can be sent out the wire An internal clock generates ticks each 200ns At each tick, a new time slot can be created,where some Gates can be opened and some canbe closed Effectively works like TDM (Time DivisionMultiplexing) for Ethernet

TSN Demo – Analysis: Scheduling configuration The user defines how many clock ticks each time slot takes The individual time slots are called subschedules Once the Time-Aware Scheduler goes through each time slot in a round-robin fashion, it starts overagain periodically A complete period of subschedules is called a schedule On Egress Port 2 (toward Host 2), create a subschedule for VLAN PRIO 0 and one for PRIO 3 Flow 1 is completely isolated from Flow 2Minimal interference, best utilization of bandwidth

1.2 TSN Reference Design for Application DevelopmentControllerReference DesignIndustrial GatewayReference DesignGb TSNSwitch1 Gbps EthernetTSNNetwork(Star, Ring,Branch)TSN1 GbpsEthernetTSN EndpointTSN1 Gbps EthernetTSN1 GbpsEthernetTSNSwitch1 Gbps EthernetLS1021ATSNSwitch1 Gbps EthernetLS1021ATSN SlavesGb EthernetIndustrial Ethernet ProtocolsApplicationsTSN PLCs,Automotive GatewayEndpointReferenceDesignApplicationsLegacy IndustrialPLC,Industrial GatewayTSN1 GbpsEthernetTSN EndpointApplicationsRobotics controller, motorcontrol, synchronized audioplayback

Dual Core Cortex-A72 Processor ForIndustrial Applications Highest performing ARMv8-A processor core Extended temperature – 125 Deg C Tj Integrated GPU for HMI Time Sensitive Networking for deterministiclatency over Ethernet

LS1028 20 Price5W Thermal Power 125 Deg C TjTarget Markets andCustomersIndustrial Energy DistributionABB, Schneider ElectricTrust ArchitectureA72SECA721MB L2 CacheGPUEENNEETTCC4 PortSwitch Robotics ControllersKuka, Yaskawa, FanucDDR Motion ControllersDDR3L/41600 MT/secMitsubishi, Omron, Siemens HMISiemens, RockwellAutomationEmbedded BoardsIntegrated TSN Switch4k resolution(Next Generation AVB)Integrated eDP/DP PhyNext Generation EthernetControllers with TSNTQ, Kontron, AdvantechIoT GatewaysDell, Cisco, GE

LS1028AARMA72ARMA7232kB 48kB 32kB 48kBL1-D L1-I L1-D L1-I1MB L2Secure nt InterconnectTrust ZoneOctal SPI, QSPIIO MMUIO MMUIO MMUPower Management3D GPUSECAuto Respond4x UART, 6x LPUART3x I2C, 2x SPI, CAN-FDGPIO, JTAG2.5G,1G1G4 portTSNSwitch1G2x USB3.0 (w/ PHY)4K LCD eDP/DP PHY4-lane SERDESPackage: 17 x 17mm FCPBGA, 0.75 pitchSATA 3.02x SD/SDIO 4.0PCIe 3.0PCIe 3.0 Dual ARM Cortex A72 processors Up to 1.3GHz per core w/ECC protected L1/L2 32KB D / 48K I L1 cache 1MB L2 cache Memory Controller 16-bit( ECC)/32-bit( ECC) DDR4/3L High Speed Interconnect 2x PCI Express Gen3 1x SATA3.0 (4 lane SERDES shared w/PCI-e) 2x USB3.0 (with/PHY) Ethernet 6x Ethernet, 1x 1 / 2.5 Gb, 1x 1Gb, 4x 1Gb IEEE 1588 v2 TSN Datapath SEC Acceleration TSN L2 Switch Auto Respond Graphics 4K LCD Controller with eDP/DP Phy 3D GPU Advanced Audio: 5xSAI, PWM 4x UARTs, 6x LPUART, 2x CAN-FD 3x I2C, 2x SPI, 2x SD/SDIO 4.0 Octal SPI, 16 bit parallel bus Secure Boot, Trust Architecture Advanced Power Management

Time Sensitive Networking Feature aware shaping (per-queue based)Yes802.1QbuFrame pre-emptionYes802.1CBRedundancy (frame replication and elimination)No802.1QccEnhancements and improvements for stream reservationYes802.1QchCyclic queuing and forwardingNo – PAR802.1QciPer-stream filtering and policingPartial Support802.1ASTiming and synchronization (mechanisms for faster fail-over of clock Yesgrandmasters)