Handbook For Robustness Validation - ZVEI

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Handbook forRobustness Validationof Semiconductor Devicesin Automotive ApplicationsElectronic Components andSystems Division

Handbook for Robustness Validationof Semiconductor Devices in Automotive ApplicationsPublished by:ZVEI - Zentralverband Elektrotechnik- undElektronikindustrie e. V.(German Electrical and Electronic Manufacturers‘ Association)Electronic Components and Systems DivisionLyoner Straße 960528 Frankfurt am Main, GermanyPhone: 49 69 6302-402Fax: 49 69 6302-407E-mail: zvei-be@zvei.orgwww.zvei.orgContact: Dr.-Ing. Rolf WinterEditor: ZVEI Robustness Validation Working GroupAny parts of this document may be reproduced free of charge in anyformat or medium providing it is reproduced accurately and not usedin a misleading context. The material must be acknowledged as ZVEIcopyright and the title of the document has to be specified. A complimentary copy of the document where ZVEI material is quoted hasto be provided. Every effort was made to ensure that the informationgiven herein is accurate, but no legal responsibility is accepted forany errors, omissions or misleading statements in this information.The Document and supporting materials can be found on the ZVEIwebsite at: www.zvei.org/RobustnessValidationFirst edition: April 2007Second edition: February 2013Third edition: May 2015Homepage Robustness ValidationElectronic Components and Systems Divisionwww.zvei.org/robustnessvalidation

Foreword (second and third revised edition)Third revised editionIntense communication with AEC about therelationship between the standards AECQ100/Q101 and this handbook as well as theSAE standard J1897 resulted in an additionalannex in Q100 and Q101. The annex describesthe decision flow and boundary conditions,whether to apply stress test based qualification for standard, or extended duration(s), orrobustness validation.Second revised editionSince four years Robustness Validation hasfound its way into the daily business of semiconductor product qualification. During thattime several working groups of the ZVEI havepublished supporting documents:The revision of this handbook under section 9.1, explains the application of the decision flow in the Q100/101 annex in moredetail. In addition, other improvements fromRobustness Validation practice, new tutorialsand publications are subject of this revision. Robustness Validation for MEMS - Appendixto the Handbook for Robustness Validationof Semiconductor Devices in AutomotiveApplications (2009).Andreas PreussgerCore Team LeaderRV GroupEditor in Chief 3rd edition Knowledge Matrix is published on ZVEI andSAE homepage (yearly update, currently 4thversion under review). Handbook for Robustness Validation ofAutomotive Electrical/Electronic Modulesandcontent copy: SAE Standard J1211(2008, under review). Automotive Application Questionnaire forElectronic Control Units and Sensors (2006,Daimler, Robert Bosch, Infineon). Pressure Sensor Qualification beyond AEC Q100 (2008, IFX: S. Vasquez-Borucki). Robustness Validation Manual - How touse the Handbook in product engineering(2009, RV Forum). How to Measure Lifetime - Robustness Validation Step by Step (will be published October 2012).Especially the Robustness Validation Manualgives guidance in how to apply RV in differentscenarios. The specific semiconductor knowledge on failure mechanisms has been updatedon a yearly basis in the Knowledge Matrixavailable on the homepages of SAE and ZVEI.The 2nd revision contains topics the community learned during application of RobustnessValdiation and aligns the document to currentpractice.Andreas PreussgerCore Team LeaderRV GroupEditor in Chief 2nd edition3

Preface (first edition from April 2007)Can you imagine hiking on a steep mountaintrail in the black of night not knowing howclose to the edge of the cliff you are? Wouldyou feel safe?Electronic components, such as semiconductors, have technical limits that might be veryclose to the edge of the customer’s specification. When this occurs, the semiconductorcan malfunction and possibly cause an operational failure of a critical vehicle system.As in the hiking analogy, wouldn’t it be betterto have the information as to how close thesemiconductor actually performs with regardto the specification limits, or better yet, toknow that there is a the safety zone, or guardband, between to semiconductor’s performance and the specification limits?Helmut KellerChairman ZVEIRobustness Validation Committee4The basic philosophy behind the RobustnessValidation methodology described in thisHandbook is to gain knowledge about thesize of the guard band by testing the semiconductor to failure, or end-of-life. The goalof Robustness Validation is to achieve lowerppm-failure rates by ensuring adequate guardband between the ‘real-life’ operating rangeof the semiconductor and the points at whichthe semiconductor fails.The current ‘test-to-pass’ statistical methodused to select and qualify semiconductordevices does not provide information regarding the amount of guard band. This is verysimilar to hiking in the dark without knowingwhere the edge of the cliff is.The safer way is to use Robustness Validationapproach. Please read on.Jack SteinChairman SAEAutomotive Electronics Reliability Committee

Foreword (first edition)The quality of the vehicles we buy and thecompetitiveness of the automotive industrydepend on being able to make quality andreliability predictions. Qualification measuresmust provide useful and accurate data to provide added value. Increasingly, manufacturersof semiconductor components must be ableto show that they are producing meaningfulresults for the reliability of their productsunder defined Mission Profiles from the wholesupply chain.Reliability is the probability that a semiconductor component will perform in accordancewith expectations for a predetermined periodof time in a given environment. To be efficient reliability testing has to compress thistime scale by accelerated stresses to generateknowledge on the time to fail. To meet anyreliability objective requires comprehensiveknowledge of the interaction of failure modes,failure mechanisms, the Mission Profile andthe design of the product. Ten years ago youcould read: “Qualification tests of prototypesmust ensure that quality and reliability targets have been reached”.This approach is no longer sufficient to guarantee robust electronic products for a failurefree life of the car, which is the intention ofthe Zero-Defect-Approach. The emphasis hasnow shifted from merely the detection of failures to their prevention.We started this way by introducing screeningmethods after the product had been producedafter product has successfully survived astandard qualification. Then the focus shiftedto reliability methodologies applied on technology level during development.Now product qualification again changes fromthe detection of defects based on predefinedsample sizes towards the generation of knowledge by generating failure mechanisms specific data, combined with the knowledge fromthe technology field. Now we can generatereal knowledge on the robustness of products.Qualification focuses on intrinsic topics ofproducts and technologies, requiring onlysmall sample sizes. Defectivity issues now puta big load on monitoring measures, which arenow needed to demonstrate manufacturabilityand the control of extrinsic defects.This handbook should give guidance to engineers how to apply Robustness Validationduring development and qualification of semiconductor components. It was made possiblebecause many companies, semiconductormanufacturers, component manufacturers(Tier1) and car manufacturers (OEMs) workedtogether in a joint working group to bring inthe knowledge of the complete supply chain.I would like to thank all teams, organizationsand colleagues for actively supporting theRobustness Validation approach.Andreas PreussgerCore Team LeaderRobustness Validation GroupEditor in Chief 1st revision5

AcknowledgementWe would like to thank the team members of various committees and their associates for theirimportant contributions to the completion of the 1st edition of this handbook. Without theircommitment, enthusiasm, and dedication, the timely compilation of the handbook would nothave been possible.ZVEI Robustness Validation Committee ChairmanKeller, Helmut – Keller Consulting Engineering ServicesSAE Automotive Reliability Committee ChairmanStein, Jack – TransportationRobustness Validation Core TeamPreussger, Andreas (Team Leader) – Infineon TechnologiesByrne, Colman – Kostal IrelandKanert, Werner – Infineon Technologies and AEC MemberMende, Ole – AudiRickey, Roger – R.E. Rickey & AssociatesRepresentative of ZVEIWinter, Rolf – ZVEIRepresentative of SAEMichaels, Caroline – SAE InternationalRepresentative of JSAEWakiya, Tadashi – Tokai Rika Co., LtdTeam Members of Working GroupsBoettger, Eckart – Continental Automotive SystemClarac, Jean – Siemens VDO and AEC MemberCraggs, Dennis – Daimler ChryslerEnser, Bernd – Sanmina-SCIGiroux, Francois – ST MicroelectronicsGehnen, Erwin – HellaHodgson, Keith – FordHrassky, Petr – ST MicroelectronicsIshikawa, Makato – HitachiIto, Masuo – Nissan Motor CompanyJendro, Brian – Siemens VDO and AEC MemberKanekawa, Nobuyasu – HitachiKanemaru, Kenji – Tokai RikaKlauke, Martin – Renesas TechnologyKnoell, Bob – Visteon Corporation and AEC MemberKoch, Herbert – Robert BoschLiang, Zhongning – NXP Semiconductors and AEC MemberLycoudes, Nick – Freescale Semiconductor and AEC MemberMaier, Reinhold – BMWMori, Satoshi – Tokai Rika6

Nakaguro, Kunio – NissanNarumi, Kenji – TramPetersen, Frank – Elmos SemiconductorSchilde, Bernd – Brose FahrzeugteileSchmidt, Ernst – BMWSenske, Wilhelm – Daimler ChryslerTakasu, Yuji – Tokai RikaUnger, Walter – Daimler ChryslerVanzeveren, Vincent – MelexisWilson, Peter – On SemiconductorWulfert, Friedrich-Wilhelm – Freescale SemiconductorEditorial Team third revised editionPreussger, Andreas – (Team Leader), Infineon TechnologiesRongen, Rene – NXP SemiconductorsKanert, Werner – Infineon Technologies and AEC MemberWe would like to thank the other members of the RV Forum for theircontribution to the 3rd revisionRepresentative of ZVEI:Winter, Rolf – ZVEIBreibach, Jörg – Robert BoschKeller, Helmut – Representative SAEKessler, Thomas – Freescale SemiconductorsKnoell, Bob – NXP Semiconductors and AEC Memberde Place Rimmen, Peter – Danfoss Power ElectronicsLiang, Zhongning – NXP Semiconductors and AEC Member7

Content1. Introduction102. Scope103. Definition of Robustness Validation114. Robustness Validation Basics4.1Robustness Validation Summary4.2Robustness Validation Flow4.3Robustness Diagrams4.4Difference between RV Approach and Stress Test DrivenQualification Standards4.5Failure Mechanism4.6Acceptance Criteria121212135. Mission Profile / Vehicle Requirements5.1Commodity Products vs. ASICs5.2Conditions of Use5.3Vehicle Service Life5.4Environmental Conditions and Stress/Load Factors5.5Thermal Conditions5.6Electrical Conditions5.7Mechanical Conditions5.8Other Conditions5.9Thermal Conditions5.10 Electrical Conditions5.11 Mechanical Conditions5.12 Other Conditions5.13 General Remarks on Environmental Conditions17181818191919191919202020206. Technology Development217. Product Development228. Potential Risks and Failure Mechanisms8.1The Knowledge Matrix8.2How to Use the Knowledge Matrix8.3Limits of Accelerated Reliability Testing8.3.1 Limited Load Capacity (Stressability) of Devices and Test Structures8.3.2 Library Elements8.3.3 Electronic Components (Products)8.3.4 Limits of Application Range of Test Methods8.3.5 Limited Resources for Reliability Evaluation8.3.6 Limited Time for Implementation of Lessons Learnt8.3.7 Limited Knowledge on Models and Failure Mechanisms23232427272727282828289. Creation of the Qualification Plan9.1Relation to AEC-Q100/101 Stress Test Conditions and Durations9.1.1 Basic Assessment9.1.2 Mission Profile Validation on Component Level9.1.3 Robustness Validation on Component Level9.1.4 Application Note9.2Reliability Test Plan9.3Definition of a Qualification Family9.3.1 Wafer Fab9.3.2 Assembly Processes9.4Qualification Envelope29292932343536383838388151616

9.59.6Characterization Plan9.5.1 Process Characterization9.5.2 Device (Semiconductor Component) Characterization9.5.3 Production Part Lot Variation CharacterizationSample Size and Basic Statistics393940404010. Stress and Characterization4211. Robustness Assessment11.1 Lifetime as a Function of Stress Value11.2 Determine Boundary of the Safe Operating Area11.3 Determine Robustness Target and Area11.4 Determine Robustness Margin434343434412. Improvement12.1 Stress Set-up Review12.2 Mission Profile Review12.3 Application Review12.4 Screening Strategy12.5 Design for Reliability (DfR)12.6 Technology/Design Solution4545454545464613. Monitoring13.1 Planning474714. Reporting and Knowledge Exchange14.1 Content, Structure14.2 Documents for Communication, Handouts and General Remarks48484815. Examples15.1 Examples of the Lack of or Poor Qualification15.1.1 Delamination between Mould Compound and Die/Lead Frame15.1.2 Qualification of a New Leadframe Finish15.1.3 Via-Problems in Semiconductor Component Metallization15.2 Integrated Capacitor Design15.3 Requirement Temperature Cycles15.4 Power Electronics Design15.4.1 Typical Construction of a Power MOS Device15.4.2 Physics of Failure15.4.3 Impact of Die Attach Degradation on Thermal Management ofa Power MOS15.4.4 Degradation Model15.4.5 Design for Lifetime Tools15.4.6 Impact on Design of the Application and Impact on ComponentSelection Step by Step Approach49494949505151525252Appendix A – Knowledge Matrix55Appendix B – Reporting Template55Appendix C – Terms, Definitions and Abbreviations56Appendix D – References and Additional Reading57Appendix E – Relation to AEC-Q100/101 for alreadyqualified electronic components60Appendix F – From Mission Profile to TestCondition (an example)64953535454

1. IntroductionIn 2006 members of SAE International Automot

Q100/Q101 and this handbook as well as the SAE standard J1897 resulted in an additional annex in Q100 and Q101. The annex describes the decision flow and boundary conditions, whether to apply stress test based qualifica-tion for standard, or extended duration(s), or robustness validation. The revision of this handbook under sec-tion 9.1, explains the application of the deci-sion flow in the .